DS90UB964-Q1 FPD-Link III 1-Megapixel Camera …

1 MIPI CSI-2 Processor SoCDS90UB964-Q1 FPD-Link III HUB D3P/NCLKP/NFPD- link III SerializerI2 CGPIOFPD- link IIICoax or STPFPD- link III SerializerFPD- link III SerializerFPD- link III SerializerD2P/ND1P/ND0P/NProductFolderSa mple &BuyTechnicalDocumentsTools &SoftwareSupport &CommunityAn IMPORTANTNOTICEat the end of this datasheetaddressesavailability,warranty, changes,use in safety-criticalapplications,intellectual propertymattersand JULY2016DS90UB964-Q1 Quad FPD-LinkIII DeserializerHub11 Features1 Qualifiedfor AutomotiveApplications AEC-Q100 QualifiedWiththe FollowingResults: DeviceTemperatureGrade2: 40 Cto +105 CAmbientOperatingTemperatureRange DeviceHBMESDC lassificationLevel 4 kV DeviceCDMESDC lassificationLevelC6 AggregatesDataFromup to 4 CamerasOverFPD-LinkIII Interface Supports1-MegapixelSensorsWithHD720p/800 p/960pResolutionat 30-Hzor 60-HzFrameRate Multi-CameraSynchronization / 2 CSI-2 OutputPorts Supports1, 2, 3, 4 DataLanesper CSI-2port CSI-2 DataRateScalablefor 400 Mbps/ 800 Mbps/ Gbps/ GbpseachDataLane ProgrammableDataTypes FourVirtualChannels ECCand CRCG eneration SupportsSingle-EndedCoaxialor ShieldedTwisted-Pair(STP)

2 Cable AdaptiveReceiveEqualization I2C WithFast-ModePlusup to 1 Mbps FlexibleGPIO sfor CameraSyncand FunctionalSafety CompatibleWithDS90UB913AQ/913Q/933 QSerializers CRCprotectionon the internalDataPath ISO 10605and IEC 61000-4-2 ESDC ompliant2 Applications AutomotiveADAS SurroundViewSystems CameraMonitoringSystems SensorFusion Securityand Surveillance3 DescriptionTheDS90UB964-Q1is a versatilecamerahubcapableof connectingserializedcameradatareceivedfr om4 independentvideodatastreamsviaan FPD-LinkIII ,theDS90UB964-Q1receivesdatafrom1-Megapi xelimagesensorssupporting720p/800p/960pr esolutionat 30-Hzor receivedandaggregatedinto a MIPICSI-2compliantoutputforinterconnectt o a secondMIPICSI-2outputportis availableto provideadditionalbandwidth,or offersa FPD-LinkIIIdeserializers,eachenablinga connectionvia cost-effective50- single-endedcoaxialor 100- compensatefor cablelosscharacteristics.

3 The FPD-LinkIII interfacesalsoincludesaseparatelow latencybi-directionalcontrolchannelthat conveyscontrolinformationfroman I2C port andis independentof signalssuchas thoserequiredforcamerasynchronizationand functionalsafetyfeaturesalsomakeuse of this (1)PARTNUMBERPACKAGEBODYSIZE(NOM)DS90UB9 64-Q1 VQFN(64) (1) For all availablepackages,see the orderableaddendumatthe end of the : DS90UB964-Q1 SubmitDocumentationFeedbackCopyright 2016,TexasInstrumentsIncorporatedTableof Contents1 Pin Configurationand IEC and the SerialControlBus .. Applicationand Deviceand RevisionHistoryDATEREVISIONNOTESJuly 2016* +RIN2-GPIO[3]CSI0_D2 PCSI0_CLKPVDD18_P0 CSI0_D3 NCSI0_D3 PGPIO[0]I2C_SCL2 CSI0_D1 PCSI0_D2 NVDDIOCSI0_D1 NVDD_CSI0 CSI0_CLKNRIN3+VDD_FPD2 VDD18_P3 RIN3-VDD18_FPD31234567891011121314151632 3130292827262524232221201918174847464544 4342414039383736353433495051525354555657 58596061626364 VDD_FPD1 CSI1_D0 PCSI1_D1 NRIN1-GPIO[7]GPIO[5]GPIO[6]CSI1_D3 PVDD18_FPD0 RIN0+CSI1_D2 PCSI1_D1 PCSI1_D2 NINTBI2C_SDA2 CSI0_D0 PCSI0_D0 NVDDL2 VDD18_P1 MODEIDXGPIO[2]VDDL1I2C_SCLI2C_SDAVDD_CSI 1 CSI1_D0 NCSI1_CLKNCSI1_CLKPGPIO[1]

4 VDD18 ARIN1+CSI1_D3 NREFCLKDS90UB964-Q164L QFNTop down viewDAPGPIO[4] JULY2016 ProductFolderLinks: DS90UB964-Q1 SubmitDocumentationFeedbackCopyright 2016,TexasInstrumentsIncorporated5 Pin Configurationand FunctionsRGCP ackage64-PinVQFN(TopView)Table1. Pin , 23O, DPHYCSI0 DifferentialclockIf unused,leavethis pin , 25O, DPHYCSI0 Differentialdatapair 0If unused,leavethis pin , 27O, DPHYCSI0 Differentialdatapair 1If unused,leavethis pin , 29O, DPHYCSI0 Differentialdatapair 2If unused,leavethis pin , 31O, DPHYCSI0 Differentialdatapair 3If unused,leavethis pin , 35O, DPHYCSI1 DifferentialclockIf unused,leavethis pin , 37O, DPHYCSI1 Differentialdatapair 0If unused,leavethis pin , 39O, DPHYCSI1 Differentialdatapair 1If unused,leavethis pin , 41O, DPHYCSI1 Differentialdatapair 2If unused,leavethis pin.

5 DS90UB964-Q1 SubmitDocumentationFeedbackCopyright 2016,TexasInstrumentsIncorporatedTable1. Pin Functions(continued)PINI/OTYPEDESCRIPTIO NNAMENO.(1)OptimumPull-upResistor(RPU)va luedependson the I2C modeof operation,refertoSLVA689 CSI1_D3N/P42, 43O, DPHYCSI1 Differentialdatapair 3If unused,leavethis pin INTERFACERIN0-/+51, 50I/O, CMLFPD-LinkIII pin mustbe AC-coupledwith a port is unused,set RX_PORT_CTLregisterbit N to 0 to +54, 53I/O, CMLFPD-LinkIII pin mustbe AC-coupledwith a port is unused,set RX_PORT_CTLregisterbit N to 0 to +60, 59I/O, CMLFPD-LinkIII pin mustbe AC-coupledwith a port is unused,set RX_PORT_CTLregisterbit N to 0 to +63, 62I/O, CMLFPD-LinkIII pin mustbe AC-coupledwith a port is unused,set RX_PORT_CTLregisterbit N to 0 to (GENERALPURPOSEINPUTOUTPUT)

6 GPIO[0]9I/O, LVCMOS, [1]10I/O, LVCMOS, [2]14I/O, LVCMOS, [3]15I/O, LVCMOS, [4]17I/O, LVCMOS, [5]18I/O, LVCMOS, [6]19I/O, LVCMOS, [7]20I/O, LVCMOS, PINSI2C_SCL12I/O, LVCMOS,OpenDrainI2C ClockInput/ OutputInterfaceRecommendedPull-up(1)to k to , LVCMOS,OpenDrainI2C DataInput/ OutputInterfaceRecommendedPull-up(1)to k to , LVCMOS,OpenDrainI2C ClockInput/ OutputInterfaceRecommendedPull-up(1)to k to , LVCMOS,OpenDrainI2C DataInput/ OutputInterfaceRecommendedPull-up(1)to k to SerialControlBus DeviceID AddressConnectto externalpull-upto VDD18and pull-downto GNDto createa externalpull-upto VDD18and pull-downto GNDto createa , ,PDPower-downmodeINPUTIS V, deviceis enabled(normaloperation)PDB= 0, deviceis , LVCMOS,OpenDrainInterruptOutputINTBis an active-lowopendrainand controlledby the k to JULY2016 ProductFolderLinks: DS90UB964-Q1 SubmitDocumentationFeedbackCopyright 2016,TexasInstrumentsIncorporatedTable1.

7 Pin Functions(continued) V ( 5%) OR ( 10%)LVCMOSI/O PowerRequires1 F, F, and F capacitorsto V ( 5%) F or F capacitorsto GNDat V ( 5%) F or F capacitorsto GNDat V ( 5%) F or F capacitorsto GNDat V ( 5%) F or F capacitorsto GNDat V ( 5%) F or F capacitorsto GNDat V ( 5%) F or F capacitorsto GNDat the largemetalcontactat the bottomside,locatedat the centerof the the groundplane(GND).OTHERSREFCLK5I, MHzor 23 MHzLVCMOS-leveloscillatorinput(100ppm).F or 400/800 Mbps/ Gbpsa 25 MHzinputis used,and for < Gbpsoperationuse 23 MHz( ) , LVCMOS,PDThis pin shouldbe tied , 57 OChannelMonitorLoop-throughOutputDriverR outeto test pointor pad with 100 terminationresistorbetweenpins for channelmonitoring(recommended).

8 Definitionsbelowdefinethe functionalityof the I/O cellsfor : P = PowerSupply G = Ground CML= CMLI nterface DPHY= MIPIDPHYI nterface LVCMOS= LVCMOSpin I = Input O = Output I/O = Input/Output S = StrapInput PD, PU = InternalPull-Down/Pull-Up(All strappins haveweakinternalpull-upsor pull-downsdeterminedby IOZ thedefaultstrapvalueis neededto be changedthenan external1 k resistorshouldbe used.)6DS90UB964-Q1 SNLS500 : DS90UB964-Q1 SubmitDocumentationFeedbackCopyright 2016,TexasInstrumentsIncorporated(1)If Military/Aerospacespecifieddevicesare required,pleasecontactthe TexasInstrumentsSalesOfficeor Distributorsfor availabilityandspecifications.

9 (2)StressesbeyondthoselistedunderAbsolut eMaximumRatingsmay causepermanentdamageto the stressratingsonly,whichdo not implyfunctionaloperationof the deviceat theseor any otherconditionsbeyondthoseindicatedunder RecommendedOperatingConditions. Exposureto absolute-maximum-ratedconditionsfor extendedperiodsmay (unlessotherwisenoted)(1)(2)MINMAXUNITS upplyvoltageVDD11 voltage + CStoragetemperature,Tstg 65150 C(1)AECQ100-002indicatesHBMstressingis donein accordancewith the ANSI/ JEDECVALUEUNITV(ESD)Electrostaticdischar geHumanbodymodel(HBM),per AECQ100-002(1)RIN[3:0]+,RIN[3:0]- 8000 VOtherpins 4000 Chargeddevicemodel(CDM),per AECQ100-011 IEC and ISOVALUEUNITV(ESD)Electrostaticdischarge ESDR ating(IEC61000-4-2)RD= 330 , CS= 150 pFContactDischarge(RIN[3:0]+,RIN[3:0]-) 8000 VAir Discharge(RIN[3:0]+,RIN[3.)]

10 0]-) 18000 ESDR ating(ISO10605)RD= 330 , CS= 150 pF and 330 pFRD= 2 k , CS= 150 pF and 330 pFContactDischarge(RIN[3:0]+,RIN[3:0]-) 8000 VAir Discharge(RIN[3:0]+,RIN[3:0]-) (unlessotherwisenoted) ,TA 4025105 CMIPI datarate (per CSI-2lane)4008001600 MbpsMIPICSI-2HS clockfrequency200400800 MHzLocalI2C frequency, JULY2016 ProductFolderLinks: DS90UB964-Q1 SubmitDocumentationFeedbackCopyright 2016,TexasInstrumentsIncorporatedRecomme ndedOperatingConditions(continued)Overop eratingfree-airtemperaturerange(unlessot herwisenoted)MINNOMMAXUNIT(1)Supplynoise testingwas performedwith minimumcapacitors(as shownFigure38 on the PCB).A sinusoidalsignalis AC coupledfromDC to 10 MHzto the VDD11,VDD18,and VDDIO( )supplypins with amplitudeof 25 mVp-p,50 mVp-p,and 50 mVp-p/ 100mVp-prespectivelymeasuredat the (1) (1)For moreinformationabouttraditionaland new thermalmetrics,see theSemiconductorand IC PackageThermalMetricsapplicationreport, (1) DS90UB964-Q1 UNITRGC(VQFN)64 PINSR C/WR JC(top)Junction-to-case(top) C/WR C/W C/W C/WR JC(bot)Junction-to-case(bottom) C/W(1)GPIO[7:0]Register0xBE= ElectricalCharacteristicsOverrecommended operatingsupplyand V LVCMOSI/O (VDDIO= V 5%)VIHHighLevelInputVoltageGPIO[7.