Dual 4-channel analog multiplexer/demultiplexer

1 74HC4052; 74 HCT4052 Dual 4-channel analog multiplexer /demultiplexerRev. 13 9 September 2021 Product data sheet1. General descriptionThe 74HC4052; 74 HCT4052 is a dual single-pole quad-throw analog switch (2x SP4T) suitablefor use in analog or digital 4:1 multiplexer / demultiplexer applications. Each switch features fourindependent inputs/outputs (nY0, nY1, nY2 and nY3) and a common input/output (nZ). A digitalenable input (E) and two digital select inputs (S0 and S1) are common to both switches. When Eis HIGH, the switches are turned off. Inputs include clamp diodes. This enables the use of currentlimiting resistors to interface inputs to voltages in excess of Features and benefits Wide analog input voltage range from -5 V to +5 V CMOS low power dissipation High noise immunity Latch-up perforamcne exceeds 100 mA per JESD 78 Class II Level B Low ON resistance: 80 (typical) at VCC - VEE = V 70 (typical) at VCC - VEE = V 60 (typical) at VCC - VEE = V Logic level translation: to enable 5 V logic to communicate with 5 V analog signals Typical break before make built-in Complies with JEDEC standards.

2 JESD8C ( V to V) JESD7A ( V to V) Input levels: For 74HC4052: CMOS level For 74 HCT4052: TTL level ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V CDM JESD22-C101E exceeds 1000 V Specified from -40 C to +85 C and -40 C to +125 C3. Applications analog multiplexing and demultiplexing Digital multiplexing and demultiplexing Signal gatingNexperia74HC4052; 74 HCT4052 Dual 4-channel analog multiplexer /demultiplexer4. Ordering informationTable 1. Ordering informationPackageType numberTemperature rangeNameDescriptionVersion74HC4052D74 HCT4052D-40 C to +125 CSO16plastic small outline package; 16 leads;body width mmSOT109-174HC4052PW74 HCT4052PW-40 C to +125 CTSSOP16plastic thin shrink small outline package; 16 leads;body width mmSOT403-174HC4052BQ74 HCT4052BQ-40 C to +125 CDHVQFN16plastic dual in-line compatible thermal enhancedvery thin quad flat package; no leads; 16 terminals;body mmSOT763-15.

3 Functional diagram001aah8241Z13S0S1E10962Z32Y32Y22Y 12Y01Y31Y21Y11Y0425111151412 Fig. symbol001aah82510G4 MDX0 34 32104251111514121096313 Fig. logic symbolmnb043from logicVCCVEEVEEVCCVCCVEEnYnnZVCCFig. diagram (one switch)74HC_HCT4052 All information provided in this document is subject to legal disclaimers. Nexperia 2021. All rights reservedProduct data sheetRev. 13 9 September 20212 / 25 Nexperia74HC4052; 74 HCT4052 Dual 4-channel analog multiplexer /demultiplexer001aah8721-OF-4 DECODERLOGIC LEVEL CONVERSION78 VEEVSSVDD12131631415111096S0S1E1521Y01Z2 Z1Y11Y21Y32Y02Y12Y22Y34 Fig. diagram74HC_HCT4052 All information provided in this document is subject to legal disclaimers.

4 Nexperia 2021. All rights reservedProduct data sheetRev. 13 9 September 20213 / 25 Nexperia74HC4052; 74 HCT4052 Dual 4-channel analog multiplexer /demultiplexer6. Pinning Pinning74HC4052 74 HCT40522Y0 VCC2Y21Y22Z1Y12Y31Z2Y11Y0E1Y3 VEES0 GNDS1001aah82212345678109121114131615 Fig. configuration for SOT109-1 (SO16) andSOT403-1 (TSSOP16)001aah82374HC4052 74 HCT4052 VEEVCC(1)S0E1Y32Y11Y02Y31Z2Z1Y12Y21Y2 GNDS12Y0 VCCT ransparent top view71061151241331421589116terminal 1 index area(1) This is not a supply pin. There is no electrical ormechanical requirement to solder the pad. In casesoldered, the solder land should remain floating orconnected to configuration for SOT763-1 (DHVQFN16) Pin descriptionTable 2.

5 Pin descriptionSymbolPinDescription2Y0, 2Y1, 2Y2, 2Y31, 5, 2, 4independent input or output1Z, 2Z13, 3common input or outputE6enable input (active LOW)VEE7negative supply voltageGND8ground (0 V)S0, S110, 9select logic input1Y0, 1Y1, 1Y2, 1Y312, 14, 15, 11independent input or outputVCC16positive supply voltage74HC_HCT4052 All information provided in this document is subject to legal disclaimers. Nexperia 2021. All rights reservedProduct data sheetRev. 13 9 September 20214 / 25 Nexperia74HC4052; 74 HCT4052 Dual 4-channel analog multiplexer /demultiplexer7. Functional descriptionTable 3. Function tableH = HIGH voltage level; L = LOW voltage level; X = don t onLLLnY0 and nZLLHnY1 and nZLHLnY2 and nZLHHnY3 and nZHXX none8.

6 Limiting valuesTable 4. Limiting valuesIn accordance with the Absolute Maximum Rating System (IEC 60134).Voltages are referenced to VEE = GND (ground = 0 V).SymbolParameterConditionsMinMaxUnitVC Csupply voltage[1] + clamping currentVI < V or VI > VCC + V- 20mAISK switch clamping currentVSW < V or VSW > VCC + V- 20mAISW switch V < VSW < VCC + V- 25mAIEE supply current- 20mAICC supply current-50mAIGND ground current--50mATstgstorage temperature-65+150 CPtottotal power dissipation[2]-500mWPpower dissipationper switch-100mW[1] To avoid drawing VCC current out of pins nZ, when switch current flows in pins nYn, the voltage drop across the bidirectional switchmust not exceed V.

7 If the switch current flows into pins nZ, no VCC current will flow out of pins nYn. In this case there is no limit forthe voltage drop across the switch, but the voltages at pins nYn and nZ may not exceed VCC or VEE.[2] For SOT109-1 (SO16) package: Ptot derates linearly with mW/K above 110 SOT403-1 (TSSOP16) package: Ptot derates linearly with mW/K above 91 SOT763-1 (DHVQFN16) package: Ptot derates linearly with mW/K above 106 information provided in this document is subject to legal disclaimers. Nexperia 2021. All rights reservedProduct data sheetRev. 13 9 September 20215 / 25 Nexperia74HC4052; 74 HCT4052 Dual 4-channel analog multiplexer /demultiplexer9.

8 Recommended operating conditionsTable 5. Recommended operating conditions74HC405274 HCT4052 SymbolParameterConditionsMinTypMaxMinTyp MaxUnitsee Fig. 7 and Fig. 8 VCC - voltageVCC - voltageGND-VCCGND-VCCVVSW switch voltageVEE-VCCVEE-VCCVT ambambient temperature-40+25+125-40+25+125 CVCC = V--625---ns/VVCC = = V--83---ns/V t/ Vinput transition rise andfall rateVCC = V--31---ns/Vmnb0440412120488operating areaVCC - VEE (V)VCC - GND (V)Fig. operating area as a function of thesupply voltages for 74HC4052mnb045012 610 82 404128operating areaVCC - VEE (V)VCC - GND (V)Fig. operating area as a function of thesupply voltages for 74 HCT405274HC_HCT4052 All information provided in this document is subject to legal disclaimers.

9 Nexperia 2021. All rights reservedProduct data sheetRev. 13 9 September 20216 / 25 Nexperia74HC4052; 74 HCT4052 Dual 4-channel analog multiplexer /demultiplexer10. Static characteristicsTable 6. RON resistance per switch for 74HC4052 and 74 HCT4052VI = VIH or VIL; for test circuit see Fig. is the input voltage at a nYn or nZ terminal, whichever is assigned as an is the output voltage at a nYn or nZ terminal, whichever is assigned as an 74HC4052: VCC - GND or VCC - VEE = V, V, V and 74 HCT4052: VCC - GND = V and V, VCC - VEE = V, V, V and [1]MaxUnitTamb = -40 C to +85 CVis = VCC to VEEVCC = V; VEE = 0 V; ISW = 100 A[2]--- VCC = V; VEE = 0 V; ISW = 1000 A-100225 VCC = V; VEE = 0 V; ISW = 1000 A-90200 RON(peak)ON resistance(peak)VCC = V; VEE = V; ISW = 1000 A-70165 Vis = VEEVCC = V; VEE = 0 V; ISW = 100 A[2]-150- VCC = V; VEE = 0 V.

10 ISW = 1000 A-80175 VCC = V; VEE = 0 V; ISW = 1000 A-70150 VCC = V; VEE = V; ISW = 1000 A-60130 Vis = VCCVCC = V; VEE = 0 V; ISW = 100 A[2]-150- VCC = V; VEE = 0 V; ISW = 1000 A-90200 VCC = V; VEE = 0 V; ISW = 1000 A-80175 RON(rail)ON resistance (rail)VCC = V; VEE = V; ISW = 1000 A-65150 Vis = VCC to VEEVCC = V; VEE = 0 V[2]--- VCC = V; VEE = 0 V-9- VCC = V; VEE = 0 V-8- RONON resistancemismatch betweenchannelsVCC = V; VEE = V-6- Tamb = -40 C to +125 CVis = VCC to VEEVCC = V; VEE = 0 V; ISW = 100 A[2]--- VCC = V; VEE = 0 V; ISW = 1000 A--270 VCC = V; VEE = 0 V; ISW = 1000 A--240 RON(peak)ON resistance(peak)VCC = V; VEE = V; ISW = 1000 A--195 74HC_HCT4052 All information provided in this document is subject to legal disclaimers.