Transcription of Field Programmable Gate Array)は、最近のディジ …
1 FPGA Field Programmable Gate Array) 12 PLD ProgrammableLogicDevice) IC CPU ASIC 74 IC CPU IC PLD AND-OR spld (SimplePLD CPLD ComplexPLD LUT(LookUpTable FPGA FieldProgrammableGateArray) spld PLA PAL FPGA 3 PLD 70 spld spld AND-OR IC TTL (Transistor TransistorLogic)
2 74 80 CMOS Lattice GAL AND-OR 80 CPLD, FPGA PLD PLD EEPROM SRAM 2004 1991 1 2000 9 45 12 1/100 2004 200 40 1/500 CPU, DSP, PLD SoPD(System on Programmable Device)
3 4 NOT-AND-OR AND NOT AND OR AND-OR spld 5 A B C D AND OR 6 LookUpTable(LUT)
4 7 LUT 0 ABC 011 3 ( ABC 6,7 8 AND OR AND OR AND 4 4 EEPROM ROM LUT 2 4-6 LUT SRAM 9 Lattice GAL 3)
5 PLD SimplePLD spld ) 10 spld 2 ComplexPLD CPLD) 11 FPGA AND-OR 4-6 LUT2 D-FF ON/OFF ON/OFF PIN LUT ON/OFF ConfigurationData) FPGA 12 spld , CPLD.
6 FPGA PLD LUT PLD 70 80 Actel QuickLogic EEPROM ON/OFF EEPROM AND-OR Lattice Altera CPLD ROM SRAM RAM LUT CMOS ON/OFF SRAM CMOS MRAM.
7 FeRAM DRAM 13 PLD EEPROM FPGA SRAM 14 PLD Lattice GAL EEPROM spld 80 QuickLogic FPGA 15 Xilinx SRAM Quicklogic BGA(Ball Grid Array) 16 17 FPGA 3 Verilog-HDL VHDL C FPGA ( FPGA Intel Altera Quartus WebPack PC 1819 FPGA)
8 IP SoPD(System on Programmable Device) 20 Xilinx Virtex RAM, IP DCM 21 Intel( Altera Stratix RAM DSP FPGA / / 22 FPGA Lowcost 23 FPGA LUT LUT 6 5 2 Carry 24)
9 CLB CLB 25 Xilinx Altera Altera Intel Altera Stratix Xilinx 6 LUT LUT 26 Intel(Altera FPGA Intel Stratix 250MH 2728 FPGA FPGA ASIC IP FPGA ASIC ASIC FPGA ASIC 1 Non-RecurrentCost ASIC NRC FPGA NRC ASIC ASIC FPGA 29 FPGA ASIC ASIC FPGA 30 FPGA IP Intellectual)
10 Property ) IP IP IP IP PCIe DRAM FPGA 31 IP Zynq Zynq ARM FPGA SoC FPGA Zynq FPGA Intel(Altera) Aria10,Stratix10 3233 FPGA CPU CPU FPGA CPU CPU CPU CPU FPGA 343536373839404142 FPGA 43 4445