Example: dental hygienist

Intel® 64 and IA-32 Architectures Software Developer’s Manual

intel 64 and IA-32 Architectures Software Developer's Manual Volume 2 (2A, 2B, 2C & 2D): instruction set reference , A-Z. NOTE: The intel 64 and IA-32 Architectures Software Developer's Manual consists of three volumes: Basic Architecture, Order Number 253665; instruction set reference A-Z, Order Number 325383;. System Programming Guide, Order Number 325384. Refer to all three volumes when evaluating your design needs. Order Number: 325383-060US. September 2016. intel technologies features and benefits depend on system configuration and may require enabled hardware, Software , or service activation.

Intel® 64 and IA-32 Architectures Software Developer’s Manual Volume 2 (2A, 2B, 2C & 2D): Instruction Set Reference, A-Z NOTE: The Intel 64 and IA-32 Architectures Software Developer's Manual consists of three volumes:

Tags:

  Intel, Reference, Instructions, Software, Instruction set reference

Information

Domain:

Source:

Link to this page:

Please notify us if you found a problem with this document:

Other abuse

Transcription of Intel® 64 and IA-32 Architectures Software Developer’s Manual

1 intel 64 and IA-32 Architectures Software Developer's Manual Volume 2 (2A, 2B, 2C & 2D): instruction set reference , A-Z. NOTE: The intel 64 and IA-32 Architectures Software Developer's Manual consists of three volumes: Basic Architecture, Order Number 253665; instruction set reference A-Z, Order Number 325383;. System Programming Guide, Order Number 325384. Refer to all three volumes when evaluating your design needs. Order Number: 325383-060US. September 2016. intel technologies features and benefits depend on system configuration and may require enabled hardware, Software , or service activation.

2 Learn more at , or from the OEM or retailer. No computer system can be absolutely secure. intel does not assume any liability for lost or stolen data or systems or any damages resulting from such losses. You may not use or facilitate the use of this document in connection with any infringement or other legal analysis concerning intel products described herein. You agree to grant intel a non-exclusive, royalty-free license to any patent claim thereafter drafted which includes subject matter disclosed herein. No license (express or implied, by estoppel or otherwise) to any intellectual property rights is granted by this document.

3 The products described may contain design defects or errors known as errata which may cause the product to deviate from published specifica- tions. Current characterized errata are available on request. This document contains information on products, services and/or processes in development. All information provided here is subject to change without notice. Contact your intel representative to obtain the latest intel product specifications and roadmaps Copies of documents which have an order number and are referenced in this document, or other intel literature, may be obtained by calling 1- 800-548-4725, or by visiting intel , the intel logo, intel Atom, intel Core, intel SpeedStep, MMX, Pentium, VTune, and Xeon are trademarks of intel Corporation in the and/or other countries.

4 *Other names and brands may be claimed as the property of others. Copyright 1997-2016, intel Corporation. All Rights Reserved. CONTENTS. PAGE. CHAPTER 1. ABOUT THIS Manual . intel 64 AND IA-32 PROCESSORS COVERED IN THIS Manual .. 1-1. OVERVIEW OF VOLUME 2A, 2B, 2C AND 2D: instruction set reference .. 1-3. NOTATIONAL CONVENTIONS .. 1-4. Bit and Byte Order ..1-4. Reserved Bits and Software Compatibility ..1-5. Instruction Operands..1-5. Hexadecimal and Binary Numbers ..1-5. Segmented Addressing ..1-6. Exceptions ..1-6. A New Syntax for CPUID, CR, and MSR Values ..1-6. RELATED LITERATURE.

5 1-7. CHAPTER 2. INSTRUCTION FORMAT. INSTRUCTION FORMAT FOR PROTECTED MODE, REAL-ADDRESS MODE, AND VIRTUAL-8086 MODE .. 2-1. Instruction Prefixes..2-1. Opcodes..2-3. ModR/M and SIB Bytes ..2-3. Displacement and Immediate Bytes ..2-3. Addressing-Mode Encoding of ModR/M and SIB Bytes ..2-4. IA-32E MODE .. 2-7. REX Prefixes ..2-8. Encoding ..2-8. More on REX Prefix Fields..2-8. Displacement .. 2-11. Direct Memory-Offset MOVs .. 2-11. Immediates .. 2-11. RIP-Relative Addressing.. 2-12. Default 64-Bit Operand Size.. 2-12. Additional Encodings for Control and Debug Registers.

6 2-12. intel ADVANCED VECTOR EXTENSIONS ( intel AVX) .. 2-13. Instruction Format .. 2-13. VEX and the LOCK prefix .. 2-13. VEX and the 66H, F2H, and F3H prefixes .. 2-13. VEX and the REX prefix .. 2-13. The VEX Prefix .. 2-14. VEX Byte 0, bits[7:0] .. 2-15. VEX Byte 1, bit [7] - R'.. 2-15. 3-byte VEX byte 1, bit[6] - X' .. 2-16. 3-byte VEX byte 1, bit[5] - B' .. 2-16. 3-byte VEX byte 2, bit[7] - W' .. 2-16. 2-byte VEX Byte 1, bits[6:3] and 3-byte VEX Byte 2, bits [6:3]- vvvv' the Source or Dest Register Specifier.. 2-16. Instruction Operand Encoding and , ModR/M .. 2-17.

7 3-byte VEX byte 1, bits[4:0] - m-mmmm .. 2-18. 2-byte VEX byte 1, bit[2], and 3-byte VEX byte 2, bit [2]- L .. 2-18. 2-byte VEX byte 1, bits[1:0], and 3-byte VEX byte 2, bits [1:0]- pp .. 2-18. The Opcode Byte .. 2-19. The MODRM, SIB, and Displacement Bytes .. 2-19. The Third Source Operand (Immediate Byte) .. 2-19. AVX instructions and the Upper 128-bits of YMM registers .. 2-19. Vector Length Transition and Programming Considerations .. 2-19. Vol. 2A iii CONTENTS. PAGE. AVX Instruction Length .. 2-20. Vector SIB (VSIB) Memory Addressing .. 2-20. 64-bit Mode VSIB Memory Addressing.

8 2-21. AVX AND SSE INSTRUCTION EXCEPTION SPECIFICATION.. 2-21. Exceptions Type 1 (Aligned memory reference ) .. 2-26. Exceptions Type 2 (>=16 Byte Memory reference , Unaligned) .. 2-27. Exceptions Type 3 (<16 Byte memory argument) .. 2-28. Exceptions Type 4 (>=16 Byte mem arg no alignment, no floating-point exceptions) .. 2-29. Exceptions Type 5 (<16 Byte mem arg and no FP exceptions).. 2-30. Exceptions Type 6 (VEX-Encoded instructions Without Legacy SSE Analogues) .. 2-31. Exceptions Type 7 (No FP exceptions, no memory arg) .. 2-32. Exceptions Type 8 (AVX and no memory argument).

9 2-32. Exception Type 11 (VEX-only, mem arg no AC, floating-point exceptions) .. 2-33. Exception Type 12 (VEX-only, VSIB mem arg, no AC, no floating-point exceptions) .. 2-34. VEX ENCODING SUPPORT FOR GPR instructions .. 2-34. Exception Conditions for VEX-Encoded GPR instructions .. 2-35. intel AVX-512 ENCODING .. 2-35. Instruction Format and EVEX .. 2-36. Register Specifier Encoding and EVEX .. 2-38. Opmask Register Encoding .. 2-38. Masking Support in EVEX.. 2-39. Compressed Displacement (disp8*N) Support in EVEX .. 2-39. EVEX Encoding of Broadcast/Rounding/SAE Support.

10 2-40. Embedded Broadcast Support in EVEX .. 2-41. Static Rounding Support in EVEX .. 2-41. SAE Support in EVEX.. 2-41. Vector Length Orthogonality .. 2-41. #UD Equations for EVEX .. 2-42. State Dependent #UD .. 2-42. Opcode Independent #UD .. 2-42. Opcode Dependent #UD .. 2-42. Device Not Available .. 2-44. Scalar instructions .. 2-44. EXCEPTION CLASSIFICATIONS OF EVEX-ENCODED instructions .. 2-44. Exceptions Type E1 and E1NF of EVEX-Encoded instructions .. 2-48. Exceptions Type E2 of EVEX-Encoded instructions .. 2-50. Exceptions Type E3 and E3NF of EVEX-Encoded instructions .


Related search queries