IPC-TM-650 TEST METHODS MANUAL

1 1 ScopeThis test method provides a means to assess the propen-sity for conductive anodic filament (CAF) growth, a form ofelectrochemical migration, and similar conductive filament for-mation (CFF) laminate material failure modes within a printedwiring board (PWB). Conductive anodic filaments may becomposed of conductive salts, rather than cationic metal ions,however inadequate dielectric for the applied voltage, compo-nent failures, and part use exceeding the maximum operatingtemperature (MOT) of the laminate can contribute to productfailures as well. This test method can be used to assess PWBlaminate materials, PWB design and application parameters,PWB manufacturing process changes and press-fit Applicable IPCIPC-9253 CAF Test Board Design (Available in the Drafts section of the 5-32e Task group Home Page)IPC-9254 CAF Test Board Design (Available in the Drafts section of the 5-32e Task group Home Page)IPC-9255 CAF Test Board Design (Available in Free Down-loads in IPC Home Page)IPC-9256 CAF Test Board Design (Available in Free Down-loads in IPC Home Page)

2 IPC-9691 CAF Test Method User Guide for the IPC-TM-650 ,Method J-STD-001 Requirements for Soldered Electrical andElectronic AssembliesIPC J-STD-004 Requirements for Soldering FluxesIPC J-STD-006 Requirements for Electronic Grade SolderAlloys and Fluxed and Non-Fluxed Solid Solders for ElectronicSoldering ApplicationsIPC-TM- 650 test and Measurement of Ionizable SurfaceContaminants by Resistivity of Solvent Stress, Convection Reflow American Society for Testing and Materials (ASTM)ASTM D-257 Standard Test METHODS for DC Resistance orConductance of Insulating Materials3 Test SpecimensThe IPC-9254 CAF test board design is the older coupon andhas been superseded by the IPC-9253. The new smaller CAFtest coupons are IPC-9255 and IPC-9256 and are used forevaluating PTH-PTH spacings only. These smaller CAF testcoupons allow users to put a CAF test coupon at the perim-eter of their panels for testing. All IPC CAF test coupon designGerber files are down-loadable and are available on the IPCcommittee and free download web CAF Test Board DesignsThe IPC-9253 and IPC-9254 have 10 layers and dimensions are approximately125x175 mm [nominally 5x7 in].

3 Test board designs for evalu-ating CAF resistanceshallhave varying drilled hole wall todrilled hole wall distances for plated holes. These distancescan range from as low as mm [ in] separation foralternate laminate materials expected to have very high CAFresistance and minimal copper wicking out from the plated-through hole (PTH), to as high as mm [ in] sepa-ration for evaluating press-fit connector applications. Thedrilled hole size, rather than the finished hole size, is specifiedin the chart on the bare board fabrication drawing to ensureconsistent spacing. Internal layer thieving may be added toplane layers around the perimeter. Test boards should bemanufactured so that the machine/grain direction of thewoven fiber reinforcement is perpendicular to the rows ofsame-net daisy chain vias for A1-A4 (machine/grain directiontends to fail first). Test board designsshallhave sufficientminimum spacings on outer layers to ensure that surface insu-lation resistance failures do not occur.

4 Layouts of the IPC-9253 and IPC-9254 test board structures (CAF Test Boards)are shown in Figure and IPC-9254 Test Structures A1 through A4 The four structures A1-A4 each have five rows of connectedvias. Within each structure each row has 42 vias with alternat-ing rows being tied to positive or negative electrodes. The viaedge to via edge spacing is varied from one structure to thenext by using a different drilled hole size on the same 1 mm3000 Lakeside Drive, Suite 105 NBannockburn, IL 60015-1249 IPC-TM- 650 test METHODS Anodic Filament (CAF) Resistance Test:X-Y AxisDate04/16 RevisionBOriginating Task GroupElectrochemical Migration Task group (5-32e)Material in this Test METHODS MANUAL was voluntarily established by Technical Committees of IPC. This material is advisory onlyand its use or adaptation is entirely voluntary. IPC disclaims all liability of any kind as to the use, application, or adaptation of thismaterial.

5 Users are also wholly responsible for protecting themselves against all claims or liabilities for patent referenced is for the convenience of the user and does not imply endorsement by [ in] pitch between rows of daisy chain vias. The result-ing via edge to via edge spacings are: mm, mm, mm, mm [ in, in, , ]. Other than the use of different drilled hole sizes and a smallchange in pad sizes, the four structures are identical. The viasin these four test structures A1-A4 are aligned with the glassfibers. Since A1-A4 evaluate susceptibility to CAF in just onedirection, test coupons should be manufactured so that themachine direction of the woven fiber laminate reinforcement isperpendicular to the rows of same-net daisy chain vias(machine direction tends to fail first).For both A and B test structures the inner and outer layerpads are the same, , the same pad size is consistentlyused within a given test structure, although it does changefrom structure to structure.

6 All via to electrode connectionsare made on layer 2 and are repeated on layer 9 so that asingle etch-out will not affect results. Traces from via to elec-trode are routed on internal layers rather than external layersto minimize potential for surface insulation resistance details for each test structure A1-A4 follows in Table : Manhattan Distance is the shortest orthogonaldistance along the X- and/or Y- axes lines between adjacentdrilled hole features (corresponds to the orthogonal natureof the laminate material s woven glass fiber reinforcement(Figure 2).IPC-9253 and IPC-9254 Test Structures B1 through B4 The four B test structures have seven alternating rows ofvias. Within each structure, alternating rows have either 27 or26 vias with the alternating rows being tied to either positiveor negative electrodes. The via edge to via edge spacing isvaried from one structure to the next by using a differentdrilled hole size on the same mm x mm [ inx in] via grid.)

7 The mm x mm [ in in] grid has an interstitial via therefore, tipping at a45 angle results in a square mm x mm [ inx in] grid. Note: the sketches do not look squareIPC-2625-1 Figure 1 Layouts of Two Versions of the CAF Test BoardsD1A1A2A3A4B1B2B3B4C1C2C3C4D2 Area of PTHs for Test Wire AttachmentD1A1A2A3A4B1B2B3B4C1C2C3C4D2 Area of PTHs for Test Wire Attachmenta) IPC-9253b) Anodic Filament (CAF) Resistance Test: X-Y AxisDate04/16 RevisionBPage2of11when tipped 45 but, the CAF Test Boards do. The resultingvia edge to via edge spacings are: mm, mm, , mm [ in, in, in, in].Other than the use of different drilled hole sizes and a smallchange in pad sizes, the four structures are identical. The viasin the B test structure are not aligned with the glass the failure mode is along glass bundles it is reasonable toexpect the B test structure to perform better than the A structure for equivalent via edge to via edge spacings.

8 Withina given test structure, the inner and outer layer pads for all 10layers are the same, , the same pad size is consistentlyused within a given test structure although, it does changefrom structure to structure. All via to electrode connectionsare made on layer 1 and are repeated on layer 10 so that asingle etch-out will not affect conceptual representation of the B test structure ofthe coupons in Figure 1 is shown to the upper details on each of the four B test structures followsin Table Other StructuresSection C is designed to evaluateplated-through hole (PTH)-to-plane layer spacings. It is rec-ommended to use the registration coupon per test board (IPCTest Pattern F) when CAF testing includes this region. SectionD in the IPC-9254 design is for layer-to-layer Z-axis CAF test-ing. Section D in the IPC-9253 is for evaluating CAF resis-tance in a press-fit compliant pin connector application.

9 Thefeature in the D region is an optional feature that is presentautomatically with the design. However, the A, B and Cregionsshallremain as designed in order to provide a stan-dard basis of CAF test board with 10 layers is designated to evaluatethin single-ply constructions typically used on high perfor-mance boards. This board construction stackup can bereduced down to: (a) four layers by eliminating layers 3through 8 and (b) only test structures A and B, when justevaluating differences between laminate CAF Test Board DesignThis 10-layer CAF test boardfor evaluating the insulation resistance between internal con-ductors within a printed wiring board has the following keyfeatures for evaluating hole-hole CAF resistance (Figure 3).Holes In-Line (in-line with glass fiber direction): There are tworows of 42 signal-1 vias intermeshed with three rows of 42signal-2 vias; for a total of 168 potential in-line PTH-PTH fail-ures for each spacing 1 Test Structures A1 through A4 Design RulesA1A2A3A4 Outer layer pad mm [ in] mm [ in] mm [ in] mm [ in]Inner layer pad mm [ in] mm [ in] mm [ in] mm [ in]Drilled hole mm [ in] mm [ in] mm [ in] mm [ in]Via edge to via edge(shortest distance) mm [ in] mm [ in] mm [ in] mm [ in]Via edge to via edge(Manhattan Distance) mm [ in] mm [ in] mm [ in] mm [ in]On IPC-9254only, biasapplied between:J1, J5J2, J5J3, J5J4, J5 IPC-2625-2 Figure 2 Manhattan Distance (Shortest Orthogonal)abxy"Manhattan Distance" = a+ Anodic Filament (CAF) Resistance Test: X-Y AxisDate04/16 RevisionBPage3of11 Holes Staggered (closest PTH-PTH spacing in diagonal direc-tion): There are three rows of 26 signal-1 vias intermeshedwith four rows of 27 signal-2 vias.

10 For a total of 312 potentialdiagonal PTH-PTH failures for each spacing CAF Test Coupon/Board QuantityThe CAF testingdata analysis technique recommended for either of these CAFtest coupon/board designs requires a minimum 25 CAF testboards to be run per sample lot per bias level for statisticalsignificance. This provides a total of 4,200 potential in-linehole-hole CAF failure sites and 7,800 potential diagonal hole-hole CAF failure sites for each unique sample/condition comparison, on a 1,428 I/O BGA device (Figure 4) thereare about 500 power/ground pins. So with an average ofslightly less than two adjacent power/ground pin spacings perpin there are about 1,000 potential in-line hole-hole CAF fail-ure sites per BGA device. For a production board with theequivalent of three of these BGA devices and about 1200passives or other components with close power/ground pinspacings, the total number of opportunities for in-line CAF fail-ure would then be about 4,200 (about the same as the entireCAF test board sample lot of 25 pieces).