KSZ8863MLL/FLL/RLL Integrated 3-Port 10/100 Managed …

1 KSZ8863 MLL/FLL/RLL. Integrated 3-Port 10/100 Managed switch with PHYs Features - Non-Blocking switch Fabric Ensures Fast Packet Delivery by Utilizing a 1k MAC Address Advanced switch Features Lookup Table and a Store-and-Forward Archi- - IEEE VLAN Support for Up to 16 Groups tecture (Full Range of VLAN IDs) - Full-Duplex IEEE Flow Control (PAUSE). - VLAN ID Tag/Untag options , Per Port Basis with Force Mode Option - IEEE Tag Insertion or Removal on a - Half-Duplex Back Pressure Flow Control Per Port Basis (Egress) - HP Auto MDI-X for Reliable Detection of and - Programmable Rate Limiting at the Ingress and Correction for Straight-Through and Crossover Egress on a Per Port Basis Cables with Disable and Enable Option - Broadcast Storm Protection with Percent Con- - LinkMD TDR-Based Cable Diagnostics Permit trol (Global and Per Port Basis)

2 Identification of Faulty Copper Cabling - IEEE Rapid Spanning Tree Protocol - MII Interface Supports Both MAC Mode and Support PHY Mode - Tail Tag Mode (1 byte Added before FCS) Sup- - Comprehensive LED Indicator Support for Link, port at Port 3 to Inform the Processor which Activity, Full-/Half-Duplex and 10/100 Speed Ingress Port Receives the Packet and its Prior- - HBM ESD Rating 4 kV. ity switch Monitoring Features - Bypass Feature that Automatically Sustains the - Port Mirroring/Monitoring/Sniffing: Ingress and/. switch Function between Port 1 and Port 2 or Egress Traffic to Any Port or MII. when CPU (Port 3 Interface) Goes to the Sleep - MIB Counters for Fully Compliant Statistics Mode Gathering 34 MIB Counters Per Port - Self-Address Filtering - Loopback Modes for Remote Diagnostic of Fail- - Individual MAC Address for Port 1 and Port 2 ure - Supports RMII Interface and 50 MHz Reference Low Power Dissipation Clock Output - Full-Chip Software Power-Down (Register Con- - IGMP Snooping (IPv4) Support for Multicast figuration Not Saved).

3 Packet Filtering - Energy-Detect Mode Support - IPv4/IPv6 QoS Support - Dynamic Clock Tree Shutdown Feature - MAC Filtering Function to Forward Unknown - Per Port Based Software Power-Save on PHY. Unicast Packets to Specified Port (Idle Link Detection, Register Configuration Pre- Comprehensive Configuration Register Access served). - Serial Management Interface (SMI) to All Inter- - Voltages: Single Supply with Internal nal Registers LDO for VDDIO. - MII Management (MIIM) Interface to PHY Reg- - Optional , , and for VDDIO. isters - Transceiver Power for - High Speed SPI and I2C Interface to All Internal Industrial Temperature Range: 40 C to +85 C.

4 Registers Available in a 48-Pin LQFP, Lead-Free Package - I/O Pins Strapping and EEPROM to Program Selective Registers in Unmanaged switch Mode Applications - Control Registers Configurable on the Fly (Port- VoIP Phone Priority, , AN ) Set-Top/Game Box QoS/CoS Packet Prioritization Support Automotive - Per Port, and DiffServ-Based Industrial Control - Re-Mapping of Priority Field Per Port IPTV POF. basis, Four Priority Levels SOHO Residential Gateway Proven Integrated 3-Port 10/100 Ethernet switch Broadband Gateway/Firewall/VPN. - 3rd Generation switch with Three MACs and Integrated DSL/Cable Modem Two PHYs Fully Compliant with IEEE Wireless LAN Access Point + Gateway Standard Standalone 10/100 switch 2017 Microchip Technology Inc.

5 DS00002335B-page 1. KSZ8863 MLL/FLL/RLL. TO OUR VALUED CUSTOMERS. It is our intention to provide our valued customers with the best documentation possible to ensure successful use of your Microchip products. To this end, we will continue to improve our publications to better suit your needs. Our publications will be refined and enhanced as new volumes and updates are introduced. If you have any questions or comments regarding this publication, please contact the Marketing Communications Department via E-mail at We welcome your feedback. Most Current Data Sheet To obtain the most up-to-date version of this data sheet, please register at our Worldwide Web site at: You can determine the version of a data sheet by examining its literature number found on the bottom outside corner of any page.

6 The last character of the literature number is the version number, ( , DS30000000A is version A of document DS30000000). Errata An errata sheet, describing minor operational differences from the data sheet and recommended workarounds, may exist for cur- rent devices. As device/documentation issues become known to us, we will publish an errata sheet. The errata will specify the revision of silicon and revision of document to which it applies. To determine if an errata sheet exists for a particular device, please check with one of the following: Microchip's Worldwide Web site; Your local Microchip sales office (see last page). When contacting a sales office, please specify which device, revision of silicon and data sheet (include -literature number) you are using.

7 Customer Notification System Register on our web site at to receive the most current information on all of our products. DS00002335B-page 2 2017 Microchip Technology Inc. KSZ8863 MLL/FLL/RLL. Table of Contents Introduction .. 4. Pin Description and Configuration .. 5. Functional Description .. 11. Register Descriptions .. 36. Operational Characteristics .. 71. Electrical Characteristics .. 72. Timing Specifications .. 74. Reset Circuit .. 84. Selection of Isolation Transformers .. 85. Package Outline .. 86. Appendix A: Data Sheet Revision History .. 87. The Microchip Web Site .. 88. Customer Change Notification Service .. 88. Customer Support.

8 88. Product Identification System .. 89. 2017 Microchip Technology Inc. DS00002335B-page 3. KSZ8863 MLL/FLL/RLL. INTRODUCTION. General Description KSZ8863 MLL, KSZ8863 FLL, and KSZ8863 RLL are highly Integrated 3-Port switch -on-a-chip ICs in the industry's small- est footprint. They are designed to enable a new generation of low port count, cost-sensitive, and power-efficient 10/. 100 Mbps switch systems. Low power consumption, advanced power management, and sophisticated QoS features (for example, IPv6 priority classification support) make these devices ideal for IPTV, IP-STB, VoIP, automotive, and industrial applications. The KSZ8863 family is designed to support the GREEN requirement in today's switch systems.

9 Advanced power man- agement schemes include software power down, per port power down, and energy detect mode that shuts down the transceiver when a port is idle. KSZ8863 MLL/FLL/RLL also offers a bypass mode that enables system-level power saving. In this mode, the processor connected to the switch through the MII interface can be shut down without impacting the normal switch operation. The configurations provided by the KSZ8863 family enable the flexibility to meet the requirements of different applica- tions: KSZ8863 MLL: Two 10/100 BASE-T/TX transceivers and one MII interface KSZ8863 RLL: Two 10/100 BASE-T/TX transceivers and one RMII interface KSZ8863 FLL: One 100 BASE-FX, one 10/100 BASE-T/TX transceivers, and one MII interface The devices are available in RoHS-compliant 48-pin LQFP packages.

10 Industrial-grade and automotive-grade are also available. FIGURE 1-1: SYSTEM BLOCK DIAGRAM. 1K LOOK-UP. ENGINE. FIFO, FLOW CONTROL, VLAN TAGGING, PRIORITY. 10/100 . HP AUTO 10/100 . T/TX/FX. MDIX MAC 1. PHY 1. QUEUE. MANAGEMENT. 10/100 . HP AUTO 10/100 . T/TX. MDIX MAC 2. PHY 2. BUFFER. MANAGEMENT. 10/100 . 2x MII/RMII MAC 3. FRAME. BUFFERS. MIB. SPI SPI. COUNTERS. MIIM. CONTROL EEPROM. REGISTERS INTERFACE. SMI. I2C. P1 LED[1:0] LED STRAP IN. P2 LED[1:0] DRIVERS CONFIGURATION. DS00002335B-page 4 2017 Microchip Technology Inc. KSZ8863 MLL/FLL/RLL. PIN DESCRIPTION AND CONFIGURATION. FIGURE 2-1: 48-PIN 7 MM X 7 MM LQFP ASSIGNMENT, (TOP VIEW).