Transcription of Lecture 9 NMOS Field Effect Transistor (NMOSFET or NFET)
1 1 ECE 315 Spring 2005 Farhan Rana Cornell UniversityLecture 9 NMOS Field Effect Transistor ( nmosfet or NFET) In this Lecture you will learn: The operation and working of the NMOS transistorECE 315 Spring 2005 Farhan Rana Cornell UniversityA NMOS Capacitor with a Channel ContactP-Si substrate(N+ Si) Gatemetal contactmetal contactGBV+_CBV+_Inversion layerN-SiN-Si2 ECE 315 Spring 2005 Farhan Rana Cornell UniversityGateGateGBV+-GBV+-CBV+-gateGBV +-CBV+-NMOS Capacitor: Effect of VCB(VGB> VTN)VCB>0 Inversion charge decreases Depletion region expandsVCB<0 Inversion charge increases Depletion region shrinksSourceDrainSourceDrainSourceDrain TNGBoxNVVCQ Depends on VCBI nversion layer charge:ECE 315 Spring 2005 Farhan Rana Cornell UniversityA NMOS TransistorP-Si Substrate (or Bulk)Gate+__N-SiGSV+_DSVSBV+SourceDrainy 0 yLy Basic Idea.
2 Current can be made to flow in the inversion layer by applying a voltage across it in the horizontal directionN-SiSBGSGBVVV SBDSDBVVV 3 ECE 315 Spring 2005 Farhan Rana Cornell UniversityA Note on Voltage SymbolsVCB= VC-VB= -( VB-VC) = -VBCVGS= VG-VS= VG-VB+ VB-VS= VGB-VSBECE 315 Spring 2005 Farhan Rana Cornell UniversityA NMOS Transistor in 3DN-SiSourceP-Si substrateN+ Si gateN-SiDrainLGateMetal (typically Silicide) contactsWN+ Poly-SiGate4 ECE 315 Spring 2005 Farhan Rana Cornell UniversityA NMOS Transistor : Circuit SymbolsDrainSourceGateBulkVDSVGSVSB+++Dr ainSourceGateBulkVDSVGSVSB+++DrainSource GateBulkVDSVGSVSB+++_____ECE 315 Spring 2005 Farhan Rana Cornell UniversityMOS Transistor : The Gradual Channel Approximation The operation of the MOS Transistor is best understood under the gradual channel approximation which assumes that.
3 Electrostatics of the MOS Transistor in the horizontal direction have nothing to do with the electrostatics in the vertical direction This assumption decouples the 2-dimensional complicated problem into two 1-dimensional simpler problems one for the vertical direction and one for the horizontal direction. The electrostatics in the vertical direction have already been worked out by us in the context of the MOS capacitor In this Lecture we will work out the electrostatics in the horizontal direction and calculate the current flow5 ECE 315 Spring 2005 Farhan Rana Cornell UniversityA NMOS Transistor : Channel PotentialsP-Si Substrate (or Bulk)Gate+__N-SiGSV+DSVSBV+SourceDrainy0 yLy N-Si SBpCBpsVyVy 00 SBDSpDBpCBpsVVVLyVLy Potential drop in the channel.
4 DSssVyLy 0 _ECE 315 Spring 2005 Farhan Rana Cornell University0 yLy GateSourceDrainNMOS Transistor : Current Flow0 yLy Gate yvyQWIyND Current in the inversion channel at the location yis:Note: positive direction of current is when the current flows from the drain to the sourceDIDIGSVDSVSBV++DSV- yQNInversion layer charge (C/cm2) yvyDrift velocity of inversion layer charge (cm/s)Drift velocity of electrons is: yEyvyny yEyHorizontal component of the electric Field (V/cm)Therefore: yEyQWIynND yEySourceDrain6 ECE 315 Spring 2005 Farhan Rana Cornell University0 yLy GateSourceDrainThen the horizontal electric Field in the channel is: dyyVddyydyECBsy NMOS Transistor : Current FlowLet the potential in the channel from the source to the drain end be written as: yVyCBps At the source end: SBCBVyV 0At the drain end: SBDSDBCBVVVLyV Therefore: dyydVyQWICBnND ys SBV+GSV+DSV+0 yLy GateSourceDrain ys ECE 315 Spring 2005 Farhan Rana Cornell UniversityThe inversion charge in the channel is.
5 YVVyVVCyVVyQTNGBTNGBoxTNGBN For For 0 Where the position dependent threshold voltage is: oxCBpasCBpFBTNCyVqNyVVyV 222 NMOS Transistor : Inversion ChargeThe channel potential is y dependent, and therefore the threshold voltage is also y dependent. Consequently, the inversion charge is also y dependent0 yLy GateSourceDrain7 ECE 315 Spring 2005 Farhan Rana Cornell UniversityNMOS Transistor : Inversion Charge and FET Threshold Voltage yVVVCyQCVqNyVVVCyQCVyVqNyVVVCVyVyVVVVCyV qNyVVVCyVVCyQCSTNGSoxNoxSBpasCSpFBGSoxNo xSBCSpasCSpFBGSoxSBCSCBSBGSGBoxCBpasCBpF BGBoxTNGBoxN 222222: and:use222So: oxSBpaspFBTNCVqNVV 222 The NMOS Transistor threshold voltage is defined as.
6 0 yLy GateSourceDrainIgnore ECE 315 Spring 2005 Farhan Rana Cornell UniversityNMOS Transistor : Inversion Charge yVVVCyQCSTNGSoxN The inversion charge in the channel is:Near the source end: TNGSoxNCSVVCyQyV 000andNear the drain end: DSTNGSoxNDSCSVVVCyQVLyV 0andConclusions: Inversion layer charge is maximum near the source end and minimum near the drain end (as shown graphically in the figure) When VGS< VDS+ VTN, the inversion layer disappears at the drain end When VGS< VTN, the inversion layer disappears even at the source endSBV+GSV+DSV+0 yLy GateSourceDrain8 ECE 315 Spring 2005 Farhan Rana Cornell University dyydVyQWyEyQWICSnNnND Current in the inversion channel at the location yis:NMOS Transistor .
7 Current Flow dyyVddyyVdyECSCB dyydVyVVVCWICSCSTNGSoxnD Integrate the above equation from y=0 to y=L: DSVCSCSTNGSoxnLDdVVVVCWdyI00 DSDSTNGSoxnDVVVVCLWI 2 And the result is:Some interpretation is required to understand the range of validity of the above equation. This we do next ..DIGSVDSVSBV++DSV-0 yLy GateDISourceDrainECE 315 Spring 2005 Farhan Rana Cornell UniversityNMOS Transistor : Current FlowFirst note that:0 then0 when DDSIVT here can be no current when there is no bias and no electric Field in the channel to drive the currentAlso note that:The inversion layer charge is maximum at the source end and is given by: TNGSoxCSTNGSoxNVVCyVVVCyQ 00So when there is no inversion charge anywhere in the channel and therefore TNGSVV 0 DIConclusion.
8 0 0 AND: whenonly DSTNGSDVVVIDIGSVDSVSBV++DSV-0 yLy GateDISourceDrain9 ECE 315 Spring 2005 Farhan Rana Cornell UniversityDSDSTNGSoxnDVVVVCLWI 2 First plot the ID-VDScurve from the result:NMOS Transistor : Current Flow 0 and DSTNGSVVVVDSID00As VDSis increased the current increases .. but then it decreases !??This decrease is unphysical ! A mathematical artifact !Note that current is maximum when: VVVTNGSDS 6 Suppose now:DIGSVDSVSBV++DSV-0 yLy GateDISourceDrainTNGSVV ECE 315 Spring 2005 Farhan Rana Cornell UniversityNMOS Transistor : Pinch-Off DSTNGSoxCSTNGSoxNVVVCLyVVVCLyQ The inversion charge in the channel near the drain end is.
9 When VDSapproaches VGS -VTNthe inversion layer charge just near the drain end approaches zeroThis condition is called pinch-off For VDS> VGS -VTNthere is a small section of channel just near the drain end that is almost devoid of mobile carriers ( electrons). This is a highly resistive section. 0 yLy GateDISourceDrainDrainGateSiO2Ly L The channel has been pinched off 10 ECE 315 Spring 2005 Farhan Rana Cornell UniversityAny increase in VDSbeyond VGS -VTNcompletely falls across this small resistive section: ForTNGSDSVVV DrainGateSiO2Ly L The channel has been pinched off NMOS Transistor : Pinch-Off and Current SaturationChannel potential: TNGSCSVVyV Channel potential: DSCSVyV For VDS> VGS -VTN, integrate the current equation from y=0 to y=L- L.
10 TNGSVVCSCSTNGSoxnLLDdVVVVCWdyI00 2222 TNGSoxnTNGSoxnDVVCLWVVCLLWI So for VDS> VGS-VTNthe current is what it was when VDSwas equal to VGS-VTNThus for large value of VDS(> VGS VTN) the current saturates!ECE 315 Spring 2005 Farhan Rana Cornell UniversityNMOS Transistor : Current FlowVDSID00 The ID-VDScurves for an NMOS looks like as shown in the figure For For For 020202 DSTNGSTNGSoxnTNGSDSDSDSTNGSoxnTNGSDVVVVV CLWVVVVVVVCLWVVI (Cut-off region)(Linear or triode region)(Saturation regi)
