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LMX2594 15-GHz Wideband PLLatinum™ RF …

ChargePumpVtuneCPoutRFoutAPSigma-DeltaMo dulatorN DividerOSCinDouberPost-RDividerMultiplie rPre-RDivider VccRFoutAMRFoutBPVccChannelDividerLoop FilterPhaseDetectorSerial InterfaceControlSDISCKCSBMUXoutOSCinPOSC inMInputsignalRFoutBMMUXMUXSYSREFC opyright 2017, Texas Instruments IncorporatedProductFolderOrderNowTechnic alDocumentsTools &SoftwareSupport &CommunityAn IMPORTANTNOTICEat the end of this datasheetaddressesavailability,warranty, changes,use in safety-criticalapplications,intellectual propertymattersand MARCH2017 REVISEDMARCH2018 LMX259415-GHzWidebandPLLatinum RF SynthesizerWith PhaseSynchronizationand JESD204 BSupport11 Features1 10-MHzto 15-GHzOutputFrequency 110 dBc/HzPhaseNoiseat 100-kHzOffsetWith15-GHzCarrier 45-fsrms Jitterat GHz(100Hz to 100 MHz) ProgrammableOutputPower PLL Key Specifications Figureof Merit: 236 dBc/Hz Normalized1/f Noise: 129 dBc/Hz HighPhaseDetectorFrequency 400-MHzIntegerMode

Charge Pump Vtune CPout RFoutAP Sigma-Delta Modulator N Divider OSCin Douber Post-R Divider Multiplier Pre-R Divider! Vcc RFoutAM …

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Transcription of LMX2594 15-GHz Wideband PLLatinum™ RF …

1 ChargePumpVtuneCPoutRFoutAPSigma-DeltaMo dulatorN DividerOSCinDouberPost-RDividerMultiplie rPre-RDivider VccRFoutAMRFoutBPVccChannelDividerLoop FilterPhaseDetectorSerial InterfaceControlSDISCKCSBMUXoutOSCinPOSC inMInputsignalRFoutBMMUXMUXSYSREFC opyright 2017, Texas Instruments IncorporatedProductFolderOrderNowTechnic alDocumentsTools &SoftwareSupport &CommunityAn IMPORTANTNOTICEat the end of this datasheetaddressesavailability,warranty, changes,use in safety-criticalapplications,intellectual propertymattersand MARCH2017 REVISEDMARCH2018 LMX259415-GHzWidebandPLLatinum RF SynthesizerWith PhaseSynchronizationand JESD204 BSupport11 Features1 10-MHzto 15-GHzOutputFrequency 110 dBc/HzPhaseNoiseat 100-kHzOffsetWith15-GHzCarrier 45-fsrms Jitterat GHz(100Hz to 100 MHz) ProgrammableOutputPower PLL Key Specifications Figureof Merit: 236 dBc/Hz Normalized1/f Noise.

2 129 dBc/Hz HighPhaseDetectorFrequency 400-MHzIntegerMode 300-MHzFractionalMode 32-bitFractional-NDivider RemoveIntegerBoundarySpursWithProgrammab leInputMultiplier Synchronizationof OutputPhaseAcrossMultipleDevices Supportfor SYSREFWith9-psResolutionProgrammableDela y FrequencyRampand ChirpGenerationAbilityforFMCWA pplications < 20- s VCOC alibrationSpeed Applications 5G and mm-WaveWirelessInfrastructure Testand MeasurementEquipment Radar MIMO PhasedArrayAntennasand BeamForming High-SpeedDataConverterClocking(Supports JESD204B)3 DescriptionTheLMX2594is a high-performance,widebandsynthesizerthat can generateany frequencyfrom10 MHzto 15 GHzwithoutusingan internaldoubler,thus eliminatingthe needfor meritof 236dBc/Hzand high-phasedetectorfrequencycan attainverylow in-bandnoiseand highspeedN-dividerhas no pre-divider.

3 Thussignificantlyreducingthe amplitudeand numberof programmableinputmultiplierto LMX2594allowsusersto synchronizethe outputof multipledevicesand also enablesapplicationsthatneeddeterministic delaybetweeninputand synthesizeup to 2segmentsof rampin an automaticrampgenerationoptionor a manualoptionfor calibrationalgorithmallowschangingfreque nciesfasterthan20 s. TheLMX2594addssupportforgeneratingor repeatingSYSREF(complianttoJESD204 Bstandard)makingit an ideallow-noiseclocksourcefor (9-psresolution)is providedin thisconfigurationto accountfor high as 7 dBmat devicerunsfroma hasintegratedLDOsthat eliminatethe needfor on-boardlow (1)PARTNUMBERPACKAGEBODYSIZE(NOM) LMX2594 VQFN(40) (1) For all availablepackages,see the orderableaddendumatthe end of the MARCH2017.

4 LMX2594 SubmitDocumentationFeedbackCopyright 2017 2018,TexasInstrumentsIncorporatedTableof Contents1 Pin Configurationand Applicationand Deviceand Mechanical,Packaging,and RevisionHistoryChangesfromRevisionA (August2017)to RevisionBPage Changedall the VCOG aintypicalvaluesin is due to improvedmeasurementmethodsand NOTa changein the Movedthe high-leveloutputvoltageparameterVCC valuefromthe MAXcolumnto the Movedthe valuefromthe MIN columnto the Changeddatais clockedout on MUXout,not SDI Addedcommentthat OSCinis clockedon risingedgesof the reformattedwith bulletedlist.

5 16 Addeddescriptionof the Changedexamplefrom200 MHz/2^32to 200 MHz/(2^32-1)..18 ChangedLD_DLYdescriptionin Table4 and removedduplicatedtext in ChangednamefromVCO_AMPCALto Addedmoreprogrammablesettingsto Table5 ..20 Addedthat OUTx_PWRstates32 to 47 are redundantand Addedterm"IncludedDivide" for ChangedFixedDiagramto showSEG0,SEG1,SEG2, Changedincludedchanneldivideto IncludedDivideand 2 X SEG0to 2 X Addedmoredescriptionon conditionsfor Changedtext from:(VCO_PHASE_SYNC=1)to: (VCO_PHASE_SYNC=0)..26 Changedtext so the userdoesnot incorrectlyassumethat MASH_SEED variesfrompart ot Changedthe RAMP_THRESH programmingfrom:0 to 232to: 0 to 233 1.

6 27 Removedcommentthat RAMP_TRIG_CALonly appliesin Changedthe RAMP_LOWand _HIGH programmingfrom:0 to 231to: 0 to 233 Changeddescriptionto be in termsof ChangedRAMP_MODEto RAMP_MANUALin theManualPin MARCH2017 REVISEDMARCH2018 ProductFolderLinks: LMX2594 SubmitDocumentationFeedbackCopyright 2017 2018,TexasInstrumentsIncorporatedRevisio nHistory(continued) Addedthat the RampCLKpin inputis re-clockedto the Addedthat RampDirrisingedgesshouldbe targetedawayfromrisingedgesof RampCLKpin..28 Changedprogrammingenumerationsfor RAMP0_INCand Changedprogrammingenumerationsfor RAMP_THRESH,RAMPx_LEN,and ChangedFigure28.

7 31 Addeddivideby 2 to Changedsomeentriesin the ChangedfINTERPOLATORSYSREF setupequationin Table18 ..32 ChangedSysRefdelayfrom:224 and 225 to: 225 and Changed"generator" modeto "master" Changeddescriptionfor ChangedFigure30 ..34 Changedwordingfor repeatermodeand Changeddescriptionof a few of the Changedtypo in R17 and Deletedreferenceto VCO_SEL_STRT_EN,this is always1 ..45 is always1..45 Changedthe enumerations0-3 and addedcontentto the INPIN_LVLfield AddedDivideby 1' to Deletedredundantformulafor Foutand also clarifiedSYSREF_DIVstartsat 4 and countsby Deletedreferenceto VCO_CAPCTRL_EN,whichis always1 and Changedtext from:fMAXto: Changedtext from:RAMP_LIMIT_LOW=232- (fLOW- fVCO) / fPD 16777216to: RAMP_LIMIT_LOW=233- 16777216x (fVCO- fLOW) / RemovedtheOSCinConfigurationtableand addedcontentto Changedpin 27 recommendationfrom10 F to 1 F in (March2017)to RevisionAPage AddedDAPpin describedas "Die AttachPad".

8 6 AddedH2 Specfor 11 Clarifiedthat outputpowerassumesthat load is matchedand lossesare Changed"SDA" pin "SDI". Alsofixedin Pin ..10 SwappedSDI and SCKin Addedgraphsand Added12 GHzVCOfrequencyfor PLL AddedPhaseNoiseplotsvs. AddedPhasenoisevs. Fpd movedsecondparagraphofReadbackintoLockDe tectsection;deletedlast paragraphofReadback(wasin wrongplace)..19 Changedtableto frequencyfor divides>6 ..21 Changedthe Addedsectionon Changedgraphicand MARCH2017 : LMX2594 SubmitDocumentationFeedbackCopyright 2017 2018,TexasInstrumentsIncorporated AddedSYSREF_EN= 1 if and only if OUTB_MUX= ChangedSysRefExampleDescriptionand Addedrecommendationto makefInterpolatora multipleof AddedINPIN_IGNORE,INPIN_LVL,and Changedaddressfor VCO_DACISET_STRTand = RESET(integermode),1 = ChangedOUT_ISELto AddedSYSREF_EN=1whenOUTB_MUX= Addedsectionfor Addeddescriptionfor FixedTYPO tableto CorrectedRAMP_BURST_TRIG descriptionto matchotherplacein Removedduplicateerrorin R101[2].

9 54 ChangedRAMP1_INCfromRAMP0to Clarifiedthat the delaywas in Swapped1 and 3 in the R110[10:9] Fixedpin namesin MARCH2017 REVISEDMARCH2018 ProductFolderLinks: LMX2594 SubmitDocumentationFeedbackCopyright 2017 2018,TexasInstrumentsIncorporated5 Pin Configurationand FunctionsRHAP ackage40-PinVQFNTop View6 LMX2594 SNAS696B MARCH2017 : LMX2594 SubmitDocumentationFeedbackCopyright 2017 2018,TexasInstrumentsIncorporatedPin the , 4, 25, 31,34, 39, F capacitorto Has , recommendsbypassingwith a F capacitorto (+). High-impedanceself-biasingpin. RequiresAC couplingcapacitor.( F recommended)9 OSCinMInputReferenceinputclock( ).

10 Highimpedanceself-biasingpin. RequiresAC couplingcapacitor.( F recommended) F capacitorto a F capacitorto recommendsconnectingC1 of loop filter closeto recommendsbypassingwith a F and 10- F capacitorto ( ). Requirespullup(typically50- resistor)to VCCas closeas possibleto pin. Can be usedas an outputsignalor (+). Requirespullup(typically50- resistor)to VCCas closeas possibleto pin. Can be usedas an outputsignalor lock detect,readback,diagnostics, recommendsbypassingwith a F capacitorto ( ). Requiresconnecting50- resistorpullupto Vcc as closeaspossibleto (+). Requiresconnecting50- resistorpullupto Vcc as closeaspossibleto recommendsbypassingwith a F and 10- F capacitorto F capacitorto F capacitorto for rampingmodethat can be usedto clockthe rampin manualrampingmodeoras a for rampingmodethat can be usedto changerampdirectionin manualrampingmodeor as a F capacitorto F capacitorto F and 10- F capacitorto F capacitorto MARCH2017 REVISEDMARCH2018 ProductFolderLinks.


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