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LPC662 Low Power CMOS Dual Operational …

LPC662 . LPC662 Low Power cmos dual Operational amplifier Literature Number: SNOS555B. LPC662 Low Power cmos dual Operational amplifier August 2000. LPC662 . Low Power cmos dual Operational amplifier General Description n Long-term integrator n High-impedance preamplifier The LPC662 cmos dual Operational amplifier is ideal for n Active filter operation from a single supply. It features a wide range of operating voltage from +5V to +15V, rail-to-rail output swing n Sample-and-Hold circuit in addition to an input common-mode range that includes n Peak detector ground. Performance limitations that have plagued cmos . amplifiers in the past are not a problem with this design. Features Input VOS, drift, and broadband noise as well as voltage gain n Rail-to-rail output swing (into 100 k and 5 k ) are all equal to or better than widely n Micropower operation ( < mW).

LPC662 Low Power CMOS Dual Operational Amplifier General Description The LPC662 CMOS Dual operational amplifier is ideal for operation from a single supply.

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Transcription of LPC662 Low Power CMOS Dual Operational …

1 LPC662 . LPC662 Low Power cmos dual Operational amplifier Literature Number: SNOS555B. LPC662 Low Power cmos dual Operational amplifier August 2000. LPC662 . Low Power cmos dual Operational amplifier General Description n Long-term integrator n High-impedance preamplifier The LPC662 cmos dual Operational amplifier is ideal for n Active filter operation from a single supply. It features a wide range of operating voltage from +5V to +15V, rail-to-rail output swing n Sample-and-Hold circuit in addition to an input common-mode range that includes n Peak detector ground. Performance limitations that have plagued cmos . amplifiers in the past are not a problem with this design. Features Input VOS, drift, and broadband noise as well as voltage gain n Rail-to-rail output swing (into 100 k and 5 k ) are all equal to or better than widely n Micropower operation ( < mW).

2 Accepted bipolar equivalents, while the Power supply n Specified for 100 k and 5 k loads requirement is typically less than mW. n High voltage gain 120 dB. This chip is built with National's advanced Double-Poly n Low input offset voltage 3 mV. Silicon-Gate cmos process. n Low offset voltage drift V/ C. See the LPC660 datasheet for a Quad cmos Operational n Ultra low input bias current 2 fA. amplifier and LPC661 for a single cmos Operational amplifier with these same features. n Input common-mode includes GND. n Operating range from +5V to +15V. Low distortion at 1 kHz Applications n n Slew rate V/ s n High-impedance buffer n Full military temperature range available n Precision current-to-voltage converter Application Circuit Howland Current Pump DS010548-23. 2001 National Semiconductor Corporation DS010548 LPC662 . Absolute Maximum Ratings (Note 3) Current at Power Supply Pin 35 mA.

3 If Military/Aerospace specified devices are required, Voltage at Input/Output Pin (V+) + , (V ) please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Operating Ratings (Note 3). Differential Input Voltage Supply Voltage Temperature Range Supply Voltage (V+ V ) 16V LPC662 AMJ/883 55 C TJ +125 C. Output Short Circuit to V+ (Note 11) LPC662AM 55 C TJ +125 C. Output Short Circuit to V (Note 1) LPC662AI 40 C TJ +85 C. Lead Temperature LPC662I 40 C TJ +85 C. (Soldering, 10 sec.) 260 C Supply Range to Storage Temp. Range 65 C to +150 C Power Dissipation (Note 9). Junction Temperature 150 C Thermal Resistance ( JA) (Note 10). ESD Rating 8-Pin Ceramic DIP 100 C/W. (C = 100 pF, R = k ) 1000V 8-Pin Molded DIP 101 C/W. Power Dissipation (Note 2) 8-Pin SO 165 C/W. Current at Input Pin 5 mA 8-Pin Side Brazed Ceramic DIP 100 C/W.

4 Current at Output Pin 18 mA. DC Electrical Characteristics Unless otherwise specified, all limits guaranteed for TJ = 25 C. Boldface limits apply at the temperature extremes. V+ = 5V, V . = 0V, VCM = , VO = and RL > 1M unless otherwise specified. LPC662AM LPC662AI LPC662I. Parameter Conditions Typ LPC662 AMJ/883 Limit Limit Units Limit (Note 4) (Note 4). (Notes 4, 8). Input Offset Voltage 1 3 3 6 mV. max Input Offset Voltage V/ C. Average Drift Input Bias Current 20 pA. 100 4 4 max Input Offset Current 20 pA. 100 2 2 max Input Resistance >1 Tera . Common Mode 0V VCM 83 70 70 63 dB. +. Rejection Ratio V = 15V 68 68 61 min Positive Power Supply 5V V+ 15V 83 70 70 63 dB. Rejection Ratio VO = 68 68 61 min Negative Power Supply 0V V 10V 94 84 84 74 dB. Rejection Ratio 82 83 73 min Input Common-Mode V+ = 5V and 15V V. Voltage Range For CMRR 50 dB 0 0 0 max V+ V+ V+ V+ V.

5 V+ V+ V+ min Large Signal RL = 100 k (Note 5) 1000 400 400 300 V/mV. Voltage Gain Sourcing 250 300 200 min Sinking 500 180 180 90 V/mV. 70 120 70 min RL = 5 k (Note 5) 1000 200 200 100 V/mV. Sourcing 150 160 80 min Sinking 250 100 100 50 V/mV. 35 60 40 min 2. LPC662 . DC Electrical Characteristics (Continued). Unless otherwise specified, all limits guaranteed for TJ = 25 C. Boldface limits apply at the temperature extremes. V+ = 5V, V . = 0V, VCM = , VO = and RL > 1M unless otherwise specified. LPC662AM LPC662AI LPC662I. Parameter Conditions Typ LPC662 AMJ/883 Limit Limit Units Limit (Note 4) (Note 4). (Notes 4, 8). Output Swing V+ = 5V V. +. RL = 100 k to V /2 min V. max V+ = 5V V. +. RL = 5 k to V /2 min V. max V+ = 15V V. RL = 100 k to V+/2 min V. max V+ = 15V V. RL = 5 k to V+/2 min V. max Output Current Sourcing, VO = 0V 22 16 16 13 mA.

6 V+ = 5V 12 14 11 min Sinking, VO = 5V 21 16 16 13 mA. 12 14 11 min Output Current Sourcing, VO = 0V 40 19 28 23 mA. V+ = 15V 19 25 20 min Sinking, VO = 13V 39 19 28 23 mA. (Note 11) 19 24 19 min Supply Current Both Amplifiers 86 120 120 140 A. VO = 145 140 160 max 3 LPC662 . AC Electrical Characteristics Unless otherwise specified, all limits guaranteed for TJ = 25 C. Boldface limits apply at the temperature extremes. V+ = 5V, V . = 0V, VCM = , VO = and RL > 1M unless otherwise specified. LPC662AM LPC662AI LPC662I. Parameter Conditions Typ LPC662 AMJ/883 Limit Limit Units Limit (Note 4) (Note 4). (Notes 4, 8). Slew Rate (Note 6) V/ s min Gain-Bandwidth Product MHz Phase Margin 50 Deg Gain Margin 17 dB. Amp-to-Amp Isolation (Note 7) 130 dB. Input Referred Voltage Noise F = 1 kHz 42. Input Referred Current Noise F = 1 kHz Total Harmonic Distortion F = 1 kHz, AV = 10, V+ = 15V %.

7 RL = 100 k , VO = 8 VPP. Note 1: Applies to both single supply and split supply operation. Continuous short circuit operation at elevated ambient temperature and/or multiple Op Amp shorts can result in exceeding the maximum allowed junction temperature of 150 C. Output currents in excess of 30 mA over long term may adversely affect reliability. Note 2: The maximum Power dissipation is a function of TJ(max), JA, and TA. The maximum allowable Power dissipation of any ambient temperature is PD = (TJ(max). TA)/ JA. Note 3: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed.

8 Note 4: Limits are guaranteed by testing or correlation. Note 5: V+ = 15V, VCM = and RL connected to For Sourcing tests, VO For Sinking tests, VO Note 6: V+ = 15V. Connected as Voltage Follower with 10V step input. Number specified is the slower of the positive and negative slew rates. Note 7: Input referred. V+ = 15V and RL = 100 k connected to V+/2. Each amp excited in turn with 1 kHz to produce VO = 13 VPP. Note 8: A military RETS electrical test specification is available on request. At the time of printing, the LPC662 AMJ/883 RETS specification complied fully with the boldface limits in this column. The LPC662 AMJ/883 may also be procured to a Standard Military Drawing specification. Note 9: For operating at elevated temperatures the device must be derated based on the thermal resistance JA with PD = (TJ TA)/ JA. Note 10: All numbers apply for packages soldered directly into a PC board.

9 Note 11: Do not connect output to V+when V+ is greater than 13V or reliability may be adversely affected. 4. LPC662 . Typical Performance Characteristics VS = , TA = 25 C unless otherwise specified Supply Current vs Input Bias Current Supply Voltage vs Temperature DS010548-28 DS010548-29. Input Common-Mode Output Characteristics Voltage Range vs Current Sinking Temperature DS010548-30 DS010548-31. Output Characteristics Input Voltage Noise Current Sourcing vs Frequency DS010548-32 DS010548-33. 5 LPC662 . Typical Performance Characteristics VS = , TA = 25 C unless otherwise specified (Continued). Crosstalk Rejection CMRR vs Frequency vs Frequency DS010548-35. DS010548-34. CMRR vs Temperature Open-Loop Voltage Gain vs Temperature DS010548-36. DS010548-38. Open-Loop Gain and Phase Responses Frequency Response vs Load Capacitance DS010548-39. DS010548-40.

10 6. LPC662 . Typical Performance Characteristics VS = , TA = 25 C unless otherwise specified (Continued). Gain and Phase Responses Gain Error vs Temperature (VOSvs VOUT). DS010548-41 DS010548-42. Non-Inverting Slew Rate Inverting Slew Rate vs Temperature vs Temperature DS010548-43 DS010548-44. Large-Signal Pulse Non-Inverting Small Non-Inverting Response Signal Pulse Response (AV = +1) (AV = +1). DS010548-45. DS010548-46. 7 LPC662 . Typical Performance Characteristics VS = , TA = 25 C unless otherwise specified (Continued). Inverting Large-Signal Inverting Small-Signal Pulse Response Pulse Response DS010548-47. DS010548-48. Power Supply Rejection Ratio vs Frequency DS010548-37. Stability vs Capacitive Load Stability vs Capacitive Load DS010548-4. DS010548-5. Note: Avoid resistive loads of less than 500 , as they may cause instability. 8. LPC662 .


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