MARIE: An Introduction to a Simple Computer

1 1 MARIE: An Introduction to a MARIE: An Introduction to a Simple ComputerSimple ComputerMachine Architecture that is Really Intuitive and EasyCS 2401 Comp. Org. & Assembly Marie -- Chapter 41 OutlineOutlineLearn the components common to every modern Computer systemmodern Computer able to explain how each component contributes to program a Simple architecture invented to illuminate these basic concepts, and how it relates to some real how the program assembly process kCS 2401 Comp. Org. & Assembly Marie -- Chapter 1 IntroductionIntroductionChapter 1 presented a general overview of Computer systemscomputer Chapter 2, we discussed how data is stored and manipulated by various Computer system 3 described the fundamental components of digital this background, we can now ddhCS 2401 Comp.

2 Org. & Assembly Marie -- Chapter 43understand how Computer components work, and how they fit together to create useful Computer 2 CPU Basic and OrganizationCPU Basic and OrganizationThe Computer s CPU fetches, decodes, and iiexecutes program two principal parts of the CPU are the datapathand the control datapathconsists of an arithmetic-logic unit and storage units (registers) that are interconnected by a data bus that is also CS 2401 Comp. Org. & Assembly Marie -- Chapter 44connected to main memory. Various CPU components perform sequenced operations according to signals provided by its control 2 CPU Basic and OrganizationCPU Basic and OrganizationRegistershold data -- addresses, program counters, data --that can be readily accessed by the that can be readily accessed by the of a register varies according to the number of registers varies from architecture to can be implemented using D 32-bit register requires 32 D arithmetic-logic unit (ALU) carries out logical and arithmetic operations as directed by the control unitCS 2401 Comp.

3 Org. & Assembly Marie -- Chapter 45arithmetic operations as directed by the control control unit determines which actions to carry out according to the values in a program counterregister and a status 3 The BUSThe BUSThe CPU shares data with other system components by way of a data busis a set of wires that simultaneously convey a single bit along each types of buses are commonly found in Computer systems: point-to-point, and 2401 Comp. Org. & Assembly Marie -- Chapter 46point-to-point bus configurationmultipoint 3 The BUSThe BUSA multipointbus is shown a multipoint bus is a shared Because a multipoint bus is a shared resource, access to it is controlled through protocols, which are built into the hardware. CS 2401 Comp. Org. & Assembly Marie -- Chapter 3 The BUSThe BUSB uses consist of data lines, control lines, and address lines convey bits from one device to anotherControl lines determine the direction of data flowwhen each device can access the busAcknowledge bus request, interrupts, and clock synchronization signalsAddress lines determine the location of the source or destination of the 2401 Comp.

4 Org. & Assembly Marie -- Chapter 3 The BUSThe BUSBus transactions:Sending an address for a read or writeSending an address for a read or writeTransferring data from memory to a register for memory readTransferring data from a register to memory for memory writeI/O reads and writes from peripheral devicesEach transfer occurs within a bus cycleCS 2401 Comp. Org. & Assembly Marie -- Chapter 49In a master-slave configuration, where more than one device can be the bus master, concurrent bus master 3 The BUSThe BUSdevice can be the bus master, concurrent bus master requests must be categories of bus arbitration are:Daisy chain:Permissions are passed from the highest-priority device to the parallel:Each device is directly connected to an arbitration using self-detection:Devices decide CS 2401 Comp.

5 Org. & Assembly Marie -- Chapter 410which gets the bus among using collision-detection:Any device can try to use the bus. If its data collides with the data of another device, it tries 4 ClocksClocksEvery Computer contains at least one clock that synchronizes the activities of its the activities of its fixed number of clock cycles are required to carry out each data movement or computational clock frequency, measured in megahertz or gigahertz, determines the speed with which all operations are carried cycle time is the reciprocal of clock 800 MHz clock has a cycle time of 2401 Comp. Org. & Assembly Marie -- Chapter 4 ClocksClocksClock speed should not be confused with CPU CPU time required to run a program is given by the general performance equation:We see that we can improve CPU throughput when we reduce the number of instructions in a program, reduce the number of cycles per instruction, or CS 2401 Comp.

6 Org. & Assembly Marie -- Chapter 412yp,reduce the number of nanoseconds per clock operation Intel 286 required 20 clock cyclesPentium required 1 clock 5 Input/Output SubsystemInput/Output SubsystemA Computer communicates with the outside world through its input/output (I/O) world through its input/output (I/O) devices connect to the CPU through various can be memory-mapped-- where the I/O device behaves like main memory from the CPU s point of bbdh hCS 2401 Comp. Org. & Assembly Marie -- Chapter 413Or I/O can be instruction-based, where the CPU has a specialized I/O instruction study I/O in detail in chapter 6 Memory Organization and Memory Organization and AddressingAddressingComputer memory consists of a linear array of addressable storage cells that are similar to b btddbl dddbl h Memory can be byte-addressable, or word-addressable, where a word typically consists of two or more is constructed of RAM chips, often referred to in terms of length the memory word size of the machine is 16 bits, then a 4M 16 RAM chip gives us 4 megabytes of 16-bit memory 2401 Comp.

7 Org. & Assembly Marie -- Chapter 6 Memory Organization and Memory Organization and AddressingAddressingHow does the Computer access a memory location corresponds to a particular location corresponds to a particular address?We observe that 4M can be expressed as 22 220= memory locations for this memory are numbered 0 through 222 , the memory bus of this system CS 2401 Comp. Org. & Assembly Marie -- Chapter 415 Thus, the memory bus of this system requires at least 22 address address lines count from 0 to 222-1 in binary. Each line is either on or off indicating the location of the desired memory 6 Memory Organization and Memory Organization and AddressingAddressingPhysical memory usually consists of more than one RAM chipthan one RAM is more efficient when memory is organized into banks of chips with the addresses interleaved across the chipsWith low-order interleaving, the low order bits of the address specify which memory bank contains the address of 2401 Comp.

8 Org. & Assembly Marie -- Chapter 416 Accordingly, in high-order interleaving, the high order address bits specify the memory 6 Memory Organization and Memory Organization and AddressingAddressingLow-Order InterleavingCS 2401 Comp. Org. & Assembly Marie -- Chapter 417 High-Order InterleavingProblem Problem 4 4 Page Page 260260 How many bits would you need to address a 2M 32 memory ifa. The memory is byte-addressable?b. The memory is word-addressable?a. There are 2M 4 bytes which equals 2 220 22= 223total CS 2401 Comp. Org. & Assembly Marie -- Chapter 418yqbytes, so 23 bits are needed for an addressb. There are 2M words which equals 2 220= 221, so 21 bits are required for an addressProblem Problem 5 5 Page Page 260260 How many bits would you need to address a 4M 16 memory ifa.

9 The memory is byte-addressable?b. The memory is word-addressable?a. There are 2M 4 bytes which equals 2 220 22= 223total CS 2401 Comp. Org. & Assembly Marie -- Chapter 419yqbytes, so 23 bits are needed for an addressb. There are 2M words which equals 2 220= 221, so 21 bits are required for an addressProblem Problem 9 9 Page Page 260260 Suppose that a 2M 16 main memory is built using 256K 8 RAM chips and memory is 8 RAM chips and memory is How many RAM chips are necessary?b. How many RAM chips are there per memory word?c. How many address bits are needed for each RAM chip?d. How many banks will this memory have?e. How many address bits are needed for all of memory?CS 2401 Comp. Org. & Assembly Marie -- Chapter 420memory?f. If high-order interleaving is used, where would address 14 (which is E in hex) be located?

10 G. Repeat Exercise 6f for low-order Problem 9 9 Page Page 260260218232182300000000 3 FFFF218 23218 23218 23218 23218 23218 23218 23218 23218 23218 23218232182300000101001110010100000 3 FFFF00000 3 FFFF00000 3 FFFF00000 3 FFFF00000 3 FFFF00000 3 FFFFCS 2401 Comp. Org. & Assembly 21218 23218 23218 23218 23218 23218 2310111011100000 3 FFFF00000 3 FFFF00000 3 FFFFP roblem Problem 11 11 Page Page 261261A digital Computer has a memory unit with 24 bits per word. The instruction set consists of 150 different word. The instruction set consists of 150 different operations. All instructions have an operation code part (opcode) and address part (allowing for only one address). Each instruction is stored in one word of How many bits are needed for the opcode?