NI 5731/5732/5733/5734R User Guide and Specifications ...

1 NI 5731/5732/5733/5734R user Guide and SpecificationsThe NI 5731/5732/5733/5734 is a family of high-speed digitizer adapter modules designed to work in conjunction with your NI flexrio FPGA module. This document contains signal information and Specifications for the NI 5731/5732/5733/5734R , which is composed of an NI flexrio FPGA module and the NI 5731/5732/5733/5734. This document also contains tutorial sections that demonstrate how to acquire data using a LabVIEW FPGA example VI and how to create and run your own LabVIEW project with the NI 5731/5732/5733 5731/5732/5733/5734R refers to the combination of your NI 5731/5732/5733/5734 adapter module and your NI flexrio FPGA module. NI 5731/5732/5733/5734 refers to your NI 5731/5732/5733/5734 adapter module description of each of the NI 5731/5732/5733/5734 devices is given below: NI 5731 2 analog input, 12-bit, 40 MS/s digitizer NI 5732 2 analog input, 14-bit, 80 MS/s digitizer NI 5733 2 analog input, 16-bit, 120 MS/s digitizer NI 5734 4 analog input, 16-bit, 120 MS/s digitizerContentsElectromagnetic Compatibility 2 How to Use Your NI flexrio Documentation Set.

2 3 Front Panel and Connector Pinouts .. 4 Block Diagram .. 6NI 5731/5732/5733/5734 Component-Level Intellectual Property (CLIP).. 9 Using Your Device with a LabVIEW FPGA Example VI .. 10 Creating a LabVIEW Project and Running a VI on an FPGA Target .. 15 Where to Go for Support .. 41 Appendix: Installing EMI Controls .. 42 NI 5731/5732/5733/5734R user Guide and configuring your NI 5731/5732/5733/5734R , you must install the appropriate software and hardware. Refer to the NI flexrio FPGA Module Installation Guide and Specifications for installation instructions. Figure 1 shows an example of a properly connected NI flexrio 1. NI flexrio DeviceElectromagnetic Compatibility GuidelinesThis product was tested and complies with the regulatory requirements and limits for electromagnetic compatibility (EMC) as stated in the product Specifications . These requirements and limits are designed to provide reasonable protection against harmful interference when the product is operated in its intended operational electromagnetic product is intended for use in industrial locations.

3 There is no guarantee that harmful interference will not occur in a particular installation, when the product is connected to a test object, or if the product is used in residential areas. To minimize the potential for the product to cause interference to radio and television reception or to experience unacceptable performance degradation, install and use this product in strict accordance with instructions in the product , any changes or modifications to the product not expressly approved by national instruments could void your authority to operate it under your local regulatory ensure the specified EMC performance, you must install PXI EMC Filler Panels ( national instruments part number 778700-01) in adjacent chassis slots. For more information about installing PXI EMC filler panels in your system, refer to the Appendix: Installing EMI Controls section of this ensure the specified EMC performance, operate this product only with shielded cables and ensure the specified EMC performance, install the included snap-on ferrite bead ( national instruments part number 711856-01) on any cable attached to the AUX I/O connector in accordance with the instructions listed in the Appendix: Installing EMI Controls product is sensitive to electrostatic discharge (ESD).

4 To ensure the specified EMC performance, follow the programming instructions listed at the end of the Using Your Device with a LabVIEW FPGA Example VI and Creating a LabVIEW Project and Running a VI on an FPGA Target sections of this FlexRIOA dapter Module+=NI flexrio DeviceNI flexrio FPGA Module national instruments Corporation3NI 5731/5732/5733/5734R user Guide and SpecificationsHow to Use Your NI flexrio Documentation SetRefer to Figure 2 and Table 1 for information about how to use your NI flexrio documentation 2. How to Use Your NI flexrio Documentation SetTable 1. NI flexrio Documentation Locations and DescriptionsDocumentLocationDescriptionN I flexrio FPGA Module Installation Guide and Specifications *Available in your FPGA module hardware kit and from the Start installation instructions for your NI flexrio system and Specifications for your FPGA xxxxR user Guide and Specifications *Available from the Start signal information, examples, and Specifications for your adapter FPGA Module Help*Embedded in LabVIEW information about the basic functionality of LabVIEW FPGA flexrio Help*Embedded in LabVIEW FPGA Module FPGA module, adapter module, and CLIP configuration ExamplesAvailable in NI Example examples of how to run FPGA VIs and Host VIs on your Useful Information on LabVIEW FPGA functions and intellectual property to product information and data sheets for NI flexrio devices.

5 * These documents are also available at FPGAM odule HelpNI FlexRIOHelpLabVIEWE xamplesINSTALL Hardwareand SoftwareCONNECT Signalsand Learn AboutYour AdapterModuleLEARN AboutLabVIEW FPGAM odulePROGRAM YourNI flexrio Systemin LabVIEW FPGAM oduleNI flexrio FPGA ModuleInstallation Guide and Specifications NI flexrio Adapter ModuleUser Guide and SpecificationsAreYou New toLabVIEW FPGAM odule?Ye sN oNo NI 5731/5732/5733/5734R user Guide and Panel and Connector PinoutsFront PanelTable 2 shows the front panel connector and signal descriptions for the NI 5731/5732/5733/5734. Refer to the Specifications section of this document for additional signal 2. NI 5731/5732/5733/5734 Front Panel ConnectorsConnectorSignal DescriptionAI 050 single-ended analog input channel 150 single-ended analog input channel 250 single-ended analog input channel 2 (NI 5734 only).AI 350 single-ended analog input channel 3 (NI 5734 only).

6 CLK INReference or external clock input, 50 I/ORefer to Table 3 for the signal list and 0 CLK INAI 1NI 5732 INSTRUMENTSNATIONAL80 MS/sDigitizerAUXI/OAI 0 CLK INAI 1NI 5731 INSTRUMENTSNATIONAL40 MS/sDigitizerAUXI/OAI 0 CLK INAI 1NI 5733 INSTRUMENTSNATIONAL120 MS/sDigitizerAUXI/OAI 0 CLK INAI 1AI 3AI 2NI 5734 INSTRUMENTSNATIONAL120 MS/sDigitizer national instruments Corporation5NI 5731/5732/5733/5734R user Guide and SpecificationsCautionConnections that exceed any of the maximum ratings of any connector on the NI 5731/5732/5733/5734 can damage the device and the chassis. NI is not liable for any damage resulting from such signal connections. For the maximum input and output ratings for each signal, refer to the Specifications section of this I/O ConnectorTable 3 shows the pin assignments for the AUX I/O connector on the NI 5731/5732/5733 AUX I/O connector accepts a standard, third-party HDMI cable, but the AUX I/O port is not an HDMI interface.

7 Do not connect the AUX I/O port on the NI 5731/5732/5733/5734 into the HDMI port of another device. NI is not liable for any damage resulting from such signal 3. NI 5731/5732/5733/5734 AUX I/O Connector Pin AssignmentsAUX I/O ConnectorPinSignalSignal Description1 DIO Port 0 (0)Bidirectional single-ended digital I/O data reference for Port 0 (1)Bidirectional single-ended digital I/O data Port 0 (2)Bidirectional single-ended digital I/O data reference for Port 0 (3)Bidirectional single-ended digital I/O data Port 1 (0)Bidirectional single-ended digital I/O data reference for Port 1 (1)Bidirectional single-ended digital I/O data Port 1 (2)Bidirectional single-ended digital I/O data reference for Port 1 (3)Bidirectional single-ended digital I/O data 0 Bidirectional single-ended digital I/O data 1 Bidirectional single-ended digital I/O data 2 Bidirectional single-ended digital I/O data reference for +5V+5 V power (10 mA maximum).

8 19 PFI 3 Bidirectional single-ended digital I/O data NI 5731/5732/5733/5734R user Guide and DiagramFigure 3 shows the NI 5731/5732/5733/5734 block diagram and signal flow to and from the NI 5731/5732/5733/5734 component-level intellectual property (CLIP) by way of the adapter module and the corresponding CLIP in LabVIEW 3. NI 5731/5732/5733/5734 Connector Signals and CLIP Signal Block DiagramNI 5731/5732/5733/5734 Adapter ModuleAI 0AI 2 DIO Port 0 (0)DIO Port 0 (1)DIO Port 0 (2)DIO Port 0 (3)DIO Port 1 (0)DIO Port 1 (1)DIO Port 1 (2)DIO Port 1 (3)PFI 0 PFI 1 PFI 2 PFI 3 AUX I/OADCADC ClockADC DataSample ClockADCLabVIEW FPGA CLIPADC ClockADC DataADCI nterfaceADCI nterfaceAI 0AI 2AI 0 Over RangeAI 2 Over Range16DC Over Voltage4 SPI Device SelectSPI ReadSPI WriteSPI Write DataSPI AddressSPI Idle3232 DIO Port 0 WEDIO Port 0 Rd Data (0)DIO Port 0 Wr Data (0)DIO Port 0 Rd Data (1)DIO Port 0 Wr Data (1)DIO Port 0 Rd Data (2)DIO Port 0 Wr Data (2)DIO Port 0 Rd Data (3)DIO Port 0 Wr Data (3)DIO Port 1 Rd Data (0)DIO Port 1 Wr Data (0)DIO Port 1 Rd Data (1)DIO Port 1 Wr Data (1)DIO Port 1 Rd Data (2)DIO Port 1 Wr Data (2)DIO Port 1 Rd Data (3)DIO Port 1 Wr Data (3)

9 DIO Port 1 WEPFI 3 Wr DataPFI < > WEPFI 3 Rd DataPFI 1 Rd DataPFI 1 Wr DataPFI 2 Rd DataPFI 2 Wr DataPFI 0 Rd DataPFI 0 Wr Data4 user Data 1 user CommandUser Command CommitUser Command StatusUser ReturnInitialization DoneUser ErrorUser Command IdleUser Data 0AI 1AI 3 SPI Read DataPLL LockedSync ClockCLK INSPI EngineCalibrationEEPROMDAC SPIADC SPIADC SPIADT7408 TemperatureSensorDACOUT1 OUT2 CPOUT4 CLK1 REF INAD9511 CLK2 SPIVCXOAC/DCGain1, 2, 4xFiltersAC/DCGain1, 2, 4xFiltersPLL LoopFilterEnable VCXOE nable PLLE xternal Sample CLKE xternal Ref CLKC hannel ControlsMicrocontrollerAI 1AI 3AI 1 Over RangeAI 3 Over Range161616 national instruments Corporation7NI 5731/5732/5733/5734R user Guide and SpecificationsNI 5731/5732/5733/5734 Component-Level Intellectual Property (CLIP)The LabVIEW FPGA Module includes a feature for HDL IP integration called CLIP. NI flexrio devices support two types of CLIP: user -defined and socketed.

10 user -defined CLIP allows users to insert HDL IP into an FPGA target, enabling VHDL code to communicate directly with an FPGA VI. Socketed CLIP provides the same IP integration functionality of the user -defined CLIP, but also allows the CLIP to communicate directly with circuitry external to the FPGA. Adapter module socketed CLIP allows your IP to communicate directly with both the FPGA VI and the external adapter module connector 4 shows the relationship between an FPGA VI and 4. CLIP and FPGA VI RelationshipAdapter ModuleCLIP SocketLabVIEWFPGA VIUser-DefinedCLIPNI flexrio FPGA ModuleFPGAE xternalI/O ConnectorAdapterModuleSocketedCLIPUser-D efinedCLIPF ixed I/ODRAM 0 CLIP SocketSocketedCLIPDRAM 1 CLIP SocketSocketedCLIPF ixed I/OFixed I/ODRAM0 DRAM1 NI 5731/5732/5733/5734R user Guide and NI 5731/5732/5733/5734 ships with socketed CLIP items that are used to add module I/O to the LabVIEW NI 5731/5732/5733/5734 CLIP items provides access to two analog input channels (four analog input channels on the NI 5734), eight bidirectional DIO channels, four bidirectional PFI channels, and an input clock selector that can be configured to use one of the following settings.