Transcription of OMPUTER - USTC
1 COMPUTER ORGANIZATION. AND ARCHITECTURE. DESIGNING FOR PERFORMANCE. NINTH EDITION. William Stallings Boston Columbus Indianapolis New York San Francisco Upper Saddle River Amsterdam Cape Town Dubai London Madrid Milan Munich Paris Montr al Toronto Delhi Mexico City S o Paulo Sydney Hong Kong Seoul Singapore Taipei Tokyo Editorial Director: Marcia Horton Designer: Bruce Kenselaar Executive Editor: Tracy Dunkelberger Manager, Visual Research: Karen Sanatar Associate Editor: Carole Snyder Manager, Rights and Permissions: Mike Joyce Director of Marketing.
2 Patrice Jones Text Permission Coordinator: Jen Roach Marketing Manager: Yez Alayan Cover Art: Charles Bowman/Robert Harding Marketing Coordinator: Kathryn Ferranti Lead Media Project Manager: Daniel Sandin Marketing Assistant: Emma Snider Full-Service Project Management: Shiny Rajesh/. Director of Production: Vince O'Brien Integra Software Services Pvt. Ltd. Managing Editor: Jeff Holcomb Composition: Integra Software Services Pvt. Ltd. Production Project Manager: Kayla Smith-Tarbox Printer/Binder: Edward Brothers Production Editor: Pat Brown Cover Printer: Lehigh-Phoenix Color/Hagerstown Manufacturing Buyer: Pat Brown Text Font: Times Ten-Roman Creative Director: Jayne Conte Credits: Figure : reprinted with permission from The Computer language Company, Inc.
3 Figure : Buyya, Rajkumar, High-Performance Cluster Computing: Architectures and Systems, Vol I, 1st edition, 1999. Reprinted and Electronically reproduced by permission of Pearson Education, Inc. Upper Saddle River, New Jersey, Figure : Reprinted with permission from Ethernet Alliance. Credits and acknowledgments borrowed from other sources and reproduced, with permission, in this textbook appear on the appropriate page within text. Copyright 2013, 2010, 2006 by Pearson Education, Inc., publishing as Prentice Hall.
4 All rights reserved. Manufactured in the United States of America. This publication is protected by Copyright, and permission should be obtained from the publisher prior to any prohibited reproduction, storage in a retrieval system, or transmission in any form or by any means, electronic, mechanical, photocopying, recording, or likewise. To obtain permission(s) to use material from this work, please submit a written request to Pearson Education, Inc., Permissions Department, One Lake Street, Upper Saddle River, New Jersey 07458, or you may fax your request to 201-236-3290.
5 Many of the designations by manufacturers and sellers to distinguish their products are claimed as trademarks. Where those designations appear in this book, and the publisher was aware of a trademark claim, the designations have been printed in initial caps or all caps. Library of Congress Cataloging-in-Publication Data available upon request 10 9 8 7 6 5 4 3 2 1. ISBN 10: 0-13-293633-X. ISBN 13: 978-0-13-293633-0. To Tricia (ATS), my loving wife, the kindest and gentlest person This page intentionally left blank CONTENTS.
6 Online Resources xi Preface xiii About the Author xxi Chapter 0 Reader's and Instructor's Guide 1. Outline of the Book 2. A Roadmap for Readers and Instructors 2. Why Study Computer Organization and Architecture? 3. Internet and Web Resources 5. PART ONE OVERVIEW 6. Chapter 1 Introduction 6. Organization and Architecture 7. Structure and Function 8. Key Terms and Review Questions 14. Chapter 2 Computer Evolution and Performance 15. A Brief History of Computers 16. Designing for Performance 37. Multicore, MICs, and GPGPUs 43.
7 The Evolution of the Intel x86 Architecture 44. Embedded Systems and the ARM 45. Performance Assessment 49. Recommended Reading 59. Key Terms, Review Questions, and Problems 60. PART TWO THE COMPUTER SYSTEM 65. Chapter 3 A Top-Level View of Computer Function and Interconnection 65. Computer Components 66. Computer Function 68. Interconnection Structures 84. Bus Interconnection 85. Point-To-Point Interconnect 93. PCI Express 98. Recommended Reading 108. Key Terms, Review Questions, and Problems 108.
8 Chapter 4 Cache Memory 112. Computer Memory System Overview 113. Cache Memory Principles 120. Elements of Cache Design 123. v vi CONTENTS. Pentium 4 Cache Organization 141. ARM Cache Organization 144. Recommended Reading 146. Key Terms, Review Questions, and Problems 147. Appendix 4A Performance Characteristics of Two-Level Memories 152. Chapter 5 Internal Memory 159. Semiconductor Main Memory 160. Error Correction 170. Advanced DRAM Organization 174. Recommended Reading 180. Key Terms, Review Questions, and Problems 181.
9 Chapter 6 External Memory 185. Magnetic Disk 186. RAID 195. Solid State Drives 205. Optical Memory 210. Magnetic Tape 215. Recommended Reading 217. Key Terms, Review Questions, and Problems 218. Chapter 7 Input/Output 221. External Devices 223. I/O Modules 226. Programmed I/O 228. Interrupt-Driven I/O 232. Direct Memory Access 240. I/O Channels and Processors 246. The External Interface: Thunderbolt and In niband 248. IBM zEnterprise 196 I/O Structure 256. Recommended Reading 260. Key Terms, Review Questions, and Problems 260.
10 Chapter 8 Operating System Support 265. Operating System Overview 266. Scheduling 277. Memory Management 283. Pentium Memory Management 294. ARM Memory Management 299. Recommended Reading 304. Key Terms, Review Questions, and Problems 304. PART THREE ARITHMETIC AND LOGIC 309. Chapter 9 Number Systems 309. The Decimal System 310. Positional Number Systems 311. The Binary System 312. Converting Between Binary and Decimal 312. CONTENTS vii Hexadecimal Notation 315. Recommended Reading 317. Key Terms and Problems 317.
