Passive Delay Line Design Considerations - Rhombus Ind

1 15801 Chemical Lane, Huntington Beach, CA 92649-1595 Tel: (714) 898-0960 Fax: (714) 896-0971 APP1_PAS 1/98 RhombusIndustries Time: The rise time of a Delay line is typically measured from the 10%to 90% points of the leading edge of the output pulse. The measured outputrisetime ( tr o ) is a function of the input rise time ( tr i ) and the true rise timeof the Delay line ( tr ): tr = tr o2 - tr i2An analog Delay line 's bandwidth (-3dB attenuation) is related to thenetwork's rise time which is dependent upon the total number (N) of LCsections.

2 The Delay -to-rise time ratio is the figure of merit, or Quality Factor,used to characterize Delay lines. Generally, the greater figure of meritimplies higher number of sections, and therefore higher cost. The band-width for the network, and number of sections follow these approxima-tions: BW .35 / tr N (Td / tr) : The output voltage attenuation of a Delay line has severalcontributing resistance (DCR) and ground plane effects at mismatches at limitations (BW) of Delay lineWhen the Delay line is minimally loaded, properly terminated and the inputpulse widths are significantly greater than the line 's rise time, attenuationis given by:Attenuation (%) = 1 - (Zo / (Zo + DCR))Series Connection.

3 Passive Delay lines of the same impedance can beconnected input-to-output (cascaded) to optimize rise time and/or obtainspecific Delay values. Termination is required only at the output of the finalstage. The rise time of the grouped lines is given by tro = tr i2 + tr 12 + tr 22 + .. tr N2 Reflections: Loading at taps should be at least 10 times the characteristicimpedance to minimize reflections due to transmission line effects. Thereflected voltage due to a tap loaded by a resistance, RL, is given byReflection (%) = 1 - (1 / (1 + Zo/2RL))In certain applications, mismatches can be used to achieve pulse-shapingrequirements.

4 There are three basic rules relating to reflections:1) No reflections at either terminalof a line which is terminated withits characteristic ) A reflection, equal in amplitude and of same polarity to the impingingsignal, will occur at the input of a line which is open circuited.( Rt = infinite, see figures below.)Operating Specifications - Passive DelaysPulse Overshoot (Pos) .. 5% to 10%, typicalPulse Distortion (S) .. 3% typicalWorking Voltage .. 25 VDC maximumDielectric Strength .. 100 VDC minimumInsulation Resistance.

5 1,000 M min. @ 100 VDCT emperature Coefficient .. 70 ppm/OC, typicalBandwidth (fC) .. Temperature Range .. -55O to +125 OCStorage Temperature Range .. -65O to +150 OCDesign: This LC network may be used to pass either analog or digitalsignals whose bandwidth is compatible with the intended range of opera-tion for the Delay line . A specific Delay and impedance, determine therequired LC values of the network:Td = ( Lt x Ct )ZO = ( Lt / Ct )Td = Total Delay ( ns )ZO = Impedance ( Ohms )Lt = Total line Inductance ( H )Ct = Total line Capacitance ( pF )Rt = ZoRtFigure Delay LineDesign ConsiderationsA Passive Delay line is a special purpose Low Pass Filterdesigned to Delay (phase shift) the input signal by a specifiedincrement of time, and is composed of series inductors andshunt capacitors with values dictated by the line 1A.

6 Passive Delay line Schematic < Td2xTd2xTd PW > 2xTdOpen: Rt = Figure < Td2xTd2xTd PW > 2xTdShort: Rt = 0 Figure ) A reflection, equal in amplitude and of opposite polarity to theimpinging signal, will occur at the input of a line which is shortcircuited. ( Rt = 0, see figures below.)Circuit Considerations : To assure Delay accuracy and prevent signaldistortion, care should be taken to properly integrate the Passive Delay lineinto the circuit Design . A board trace can load a tap with several picofaradsof capacitance which will increase Delay , rise time, distortion and attenu-ation.

7 The designer should calculate inductance and capacitance values ofthe Delay line ( Lt , Ct ) to determine if anticipated board loading issignificant. For typical Passive Delay line applications, the following designcriteria provide optimum line should be properly tap loading. 10 x ZO min. trace lengths to Delay should have massive ground common connections should be encourage you to call and discuss the details of your Design with oneof our application engineers.

8 We offer quick turnaround on samples, andcustom versions are available, generally at no cost for existing Chemical Lane, Huntington Beach, CA 92649-1595 Tel: (714) 898-0960 Fax: (714) 896-0971 APP1_PAS 1/98 RhombusIndustries 5A. Recommended test circuit for Passive Delay LinesRg = GENERATOR SOURCE IMPEDANCE = 50 OHMSR1, R2 = INPUT MATCHING PAD RESISTORSRt = TERMINATING RESISTORR1 = {Rg x Zo} / R2(Rg x Zo)(Zo - Rg)R2 =Zo = Delay LINES CHARACTERISTIC IMPEDANCE2 PULSEGENERATOREXTERNALTRIGGERR1R2 Delay LINEUNDER TESTINOUTRgCH ACH BTRIG INTESTPROBERt = ZoHIGH BW(350 MHz min.)

9 OSCILLOSCOPETESTPROBEEoEiTriTroTfiTfoPwT dVVVTdVOLVOHTrhTrlTdVTrlVTdVTrhLHHLF igure 7A. Active Delay line Waveform ParametersEoAtPos90%50%10%90%50%10%EiSTr iTroTfiTfoPwTdFigure 6A. Passive Delay line Waveform ParametersGLOSSARYA ttenuation (At): the difference in peakamplitude between input and output RESISTANCE (DCR): The , in ohms, measured betweenthe input and output of a Delay TIME (Td): the elapsed timebetween the respective 50% points on theleading edges of the input and (Zo).

10 The effectiveimpedance of the Delay line which is equalto the value of the terminating impedancewhich provides a minimum reflection backto the input of the Delay FALL TIME (Tfi): the elapsed timebetween the 90% and the 10% points on thetrailing edge of the input RISE TIME (Tri): the elapsed timebetween the 10% and the 90% points on theleading edge of the input VOLTAGE (Ei): the amplitude of theinput EDGE: that portion of the pulsewhich rises from zero to peak RISE TIME (Tfo): the elapsedtime between the 10% and the 90% pointson the leading edge of the output FALL TIME (Tfo): the elapsedtime between the 90% and the 10% pointson the trailing edge of the output VOLTAGE (Eo): the amplitude ofthe output DISTORTION (S): the magnitudeof the largest peak amplitude of all spuriousresponses in either a positive or negativedirection occurring in the period after the topof the leading edge of the output pulse andbefore two time delays (for flat input pulsetop).