Example: stock market

PCF85063A Tiny Real-Time Clock/calendar with alarm ...

1. General descriptionThe PCF85063A is a CMOS1 Real-Time Clock (RTC) and calendar optimized for low power consumption. An offset register allows fine-tuning of the clock. All addresses and data are transferred serially via the two-line bidirectional I2C-bus. Maximum data rate is 400 kbit/s. The register address is incremented automatically after each written or read data a selection of NXP Real-Time Clocks, see Table 45 on page 562. Features and benefits Provides year, month, day, weekday, hours, minutes, and seconds based on a kHz quartz crystal Clock operating voltage: V to V Low current; typical Aat VDD= V and Tamb=25 C 400 kHz two-line I2C-bus interface (at VDD= V to V) Programmable clock output for peripheral devices ( kHz, kHz, kHz, kHz, kHz, kHz, and 1 Hz) Selectable integrated

1. General description The PCF85063A is a CMOS1 Real-Time Clock (RTC) and calendar optimized for low power consumption. An offset register allows fine-tuning of the clock. All addresses and data are transferred serially via the two …

Information

Domain:

Source:

Link to this page:

Please notify us if you found a problem with this document:

Other abuse

Transcription of PCF85063A Tiny Real-Time Clock/calendar with alarm ...

1 1. General descriptionThe PCF85063A is a CMOS1 Real-Time Clock (RTC) and calendar optimized for low power consumption. An offset register allows fine-tuning of the clock. All addresses and data are transferred serially via the two-line bidirectional I2C-bus. Maximum data rate is 400 kbit/s. The register address is incremented automatically after each written or read data a selection of NXP Real-Time Clocks, see Table 45 on page 562. Features and benefits Provides year, month, day, weekday, hours, minutes, and seconds based on a kHz quartz crystal Clock operating voltage: V to V Low current.

2 Typical Aat VDD= V and Tamb=25 C 400 kHz two-line I2C-bus interface (at VDD= V to V) Programmable clock output for peripheral devices ( kHz, kHz, kHz, kHz, kHz, kHz, and 1 Hz) Selectable integrated oscillator load capacitors for CL=7pF or CL= pF alarm function Countdown timer Minute and half minute interrupt Oscillator stop detection function Internal Power-On Reset (POR) Programmable offset register for frequency adjustment3. Applications Digital still camera Digital video camera Printers Copy machines Mobile equipment Battery powered devicesPCF85063 ATiny Real-Time Clock/calendar with alarm function and I2C-busRev.

3 7 30 March 2018 Product data definition of the abbreviations and acronyms used in this data sheet can be found in Section information provided in this document is subject to legal disclaimers. NXP Semiconductors 2018. All rights data sheetRev. 7 30 March 2018 2 of 65 NXP SemiconductorsPCF85063 ATiny Real-Time Clock/calendar with alarm function and I2C-bus4. Ordering information Ordering options 5. Marking Table informationType numberPackageNameDescriptionVersionPCF85 063 ATSO8plastic small outline package; 8 leads; body width mmSOT96-1 PCF85063 ATLDFN2626-10 plastic thermal enhanced extremely thin small outline package; no leads; 10 terminals; body mmSOT1197-1 PCF85063 ATTTSSOP8plastic thin shrink small outline package; 8 leads.

4 Body width 3 mmSOT505-1 Table optionsProduct type numberOrderable part numberSales item (12NC)Delivery formIC revisionPCF85063AT/APCF85063AT/AY9353036 39518 tape and reel, 13 inch, dry pack1 PCF85063AT/AAZ935303639515 tape and reel, 7 inch, dry pack1 PCF85063 ATL/1 PCF85063 ATL/1,118935299022118 tape and reel, 7 inch1 PCF85063 ATT/APCF85063 ATT/AJ935304639118 tape and reel, 13 inch1 Table codesProduct type numberMarking codePCF85063AT/A85063 APCF85063 ATL/1063 APCF85063 ATT/A063 APCF85063 AAll information provided in this document is subject to legal disclaimers.

5 NXP Semiconductors 2018. All rights data sheetRev. 7 30 March 2018 3 of 65 NXP SemiconductorsPCF85063 ATiny Real-Time Clock/calendar with alarm function and I2C-bus6. Block diagram Fig diagram of PCF85063 ADDD 3&) $&/.287&/.2(26&29''9666'$6&/26&,,17',9,' (5 N+]26&,//$72532:(5 215(6(7O & %86,17(5)$&(&/2&. 287,17(55837&21752/5($/ 7,0(&/2&.6<67(0&21752/$/$50 $1'7,0(5&21752/&/2&.&$/,%5$7,212))6(7 PCF85063 AAll information provided in this document is subject to legal disclaimers. NXP Semiconductors 2018. All rights data sheetRev. 7 30 March 2018 4 of 65 NXP SemiconductorsPCF85063 ATiny Real-Time Clock/calendar with alarm function and I2C-bus7.)))))))))

6 Pinning Pinning For mechanical details, see Figure configuration for SO8 (PCF85063AT)For mechanical details, see Figure configuration for DFN2626-10 (PCF85063 ATL)For mechanical details, see Figure configuration for TSSOP8 (PCF85063 ATT) 3&) $7 26&, 9'' 26&2 &/.287 ,17 6&/ 966 6'$DDD DDD 3&) $7/7 UDQVSDUHQW WRS YLHZ9''26&, &/.28726&2 Q F &/.2( 6&/,17 6'$966 3&) $773&) $773&) $77 26&, 9'' 26&2 &/.287 ,17 6&/ 966 6'$DDD PCF85063 AAll information provided in this document is subject to legal disclaimers. NXP Semiconductors 2018.

7 All rights data sheetRev. 7 30 March 2018 5 of 65 NXP SemiconductorsPCF85063 ATiny Real-Time Clock/calendar with alarm function and Pin description [1]The die paddle (exposed pad) is connected to VSS through high ohmic (non-conductive) silicon attach and should be electrically isolated. It is good engineering practice to solder the exposed pad to an electrically isolated PCB copper pad as shown in Figure 37 Footprint information for reflow soldering of SOT1197-1 (DFN2626-10) of PCF85063 ATL for better heat transfer but it is not required as the RTC doesn t consume much power.

8 In no case should traces be run under the package exposed pad.[2]NXP recommends tying VDD of the device and VDD of all the external pull-up resistors to the same Power descriptionInput or input/output pins must always be at a defined level (VSS or VDD) unless otherwise inputOSCO222outputoscillator outputCLKOE[2]-3-inputCLKOUT enable or disable pin; enable is active HIGHINT[2]343outputinterrupt output (open-drain)VSS45[1]4supplyground supply voltageSDA[2]565input/outputserial data lineSCL[2]676inputserial clock connectedCLKOUT797outputclock output (push-pull)VDD8108supplysupply voltagePCF85063 AAll information provided in this document is subject to legal disclaimers.

9 NXP Semiconductors 2018. All rights data sheetRev. 7 30 March 2018 6 of 65 NXP SemiconductorsPCF85063 ATiny Real-Time Clock/calendar with alarm function and I2C-bus8. Functional descriptionThe PCF85063A contains 18 8-bit registers with an auto-incrementing register address, an on-chip kHz oscillator with integrated capacitors, a frequency divider which provides the source clock for the Real-Time Clock (RTC) and calender, and an I2C-bus interface with a maximum data rate of 400 built-in address register will increment automatically after each read or write of a data byte up to the register 11h.

10 After register 11h, the auto-incrementing will wrap around to address 00h (see Figure 5). All registers (see Ta b l e 5) are designed as addressable 8-bit parallel registers although not all bits are implemented. The first two registers (memory address 00h and 01h) are used as control and status register. The register at address 02h is an offset register allowing the fine-tuning of the clock; and at 03h is a free RAM byte. The addresses 04h through 0Ah are used as counters for the clock function (seconds up to years counters). Address locations 0Bh through 0Fh contain alarm registers which define the conditions for an alarm .


Related search queries