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Power MOSFET Avalanche Design Guidelines - Vishay

Vishay SILICONIXP ower MOSFETsApplication Note AN-1005 Power MOSFET Avalanche Design GuidelinesAPPLICATION NOTE Revision: 06-Dec-111 Document Number: 90160 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENTARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT OF CONTENTSPageTable of 2 Introduction .. 3 Avalanche Mode Defined .. 3 Avalanche Occurrences in Industry 3 Flyback Converter 3 Avalanche Failure 4 Power MOSFET Device 4 Rugged 5 Avalanche Testing Details .. 7 Single Pulse Unclamped Inductive Switching.

Power MOSFET Avalanche Design Guidelines APPLICATION NOTE Application Note AN-1005 www.vishay.com Vishay Siliconix Revision: 06-Dec-11 3 Document Number: 90160 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE.

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Transcription of Power MOSFET Avalanche Design Guidelines - Vishay

1 Vishay SILICONIXP ower MOSFETsApplication Note AN-1005 Power MOSFET Avalanche Design GuidelinesAPPLICATION NOTE Revision: 06-Dec-111 Document Number: 90160 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENTARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT OF CONTENTSPageTable of 2 Introduction .. 3 Avalanche Mode Defined .. 3 Avalanche Occurrences in Industry 3 Flyback Converter 3 Avalanche Failure 4 Power MOSFET Device 4 Rugged 5 Avalanche Testing Details .. 7 Single Pulse Unclamped Inductive Switching.

2 7 Decoupled VDD Voltage 7 Avalanche Rating .. 8 EAS Thermal Limit Approach .. 8 Single Pulse Example .. 8 Repetitive 10 Buyer 12 Conclusion .. 13 The purpose of this note is to better understand and utilize Power mosfets , it is important to explore the theory behindavalanche breakdown and to understand the Design and rating of rugged mosfets . Several different Avalanche ratings areexplained and their usefulness and limitations in Design is MOSFET Avalanche Design GuidelinesAPPLICATION NOTEA pplication Note Siliconix Revision: 06-Dec-112 Document Number: 90160 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE.

3 THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENTARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT OF FIGURESPageFigure 1 Flyback Converter Circuit .. 3 Figure 2 Flyback Converter Switch Under Avalanche Waveform .. 3 Figure 3 Flyback Converter Switch Under Avalanche Waveform (Detail) .. 3 Figure 4 Power MOSFET Cross Section ..4 Figure 5 Power MOSFET Circuit Model .. 4 Figure 6 Power MOSFET Cross Section Under 4 Figure 7 Basic Power MOSFET Cell Structure .. 5 Figure 8 Power MOSFET Random Device Failure Spots .. 5 Figure 9 Good Source Contact vs. Bad Source Contact Illustration.

4 6 Figure 10IA at Failure vs. Test Temperature .. 6 Figure 11 Single Pulse Unclamped Inductive Switching Test 7 Figure 12 Single Pulse Unclamped Inductive Switching Test Circuit Output Waveforms .. 7 Figure 13 Decoupled VDD Voltage Source Test Circuit Model .. 7 Figure 14 Decoupled VDD Voltage Source Test Circuit Waveforms .. 7 Figure 15 Typical Simulated Avalanche Waveforms .. 8 Figure 16 IRFP450, SiHFP450 (500 V Rated) Device Avalanche Waveforms .. 8 Figure 17 IRFP32N50K, SiHFP32N50K Datasheet 8 Figure 18 Transient Thermal Impedance Plot, Junction-to-Case.

5 9 Figure 19 Maximum Avalanche Energy vs. Temperature for Various Drain Currents .. 9 Figure 20 EAR vs. Tstart for Various Duty Cycles, Single 10 Figure 21 Typical Avalanche Current vs. Pulsewidth for Various Duty 11 Figure 22 Specification of 40 V/14 A MOSFET Datasheet Excerptions .. 11 Figure 23 Typical Effective Transient Thermal Impedance, Junction-to-Ambient .. 12 Power MOSFET Avalanche Design GuidelinesAPPLICATION NOTEA pplication Note Siliconix Revision: 06-Dec-113 Document Number: 90160 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENTARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT better understand and utilize Power mosfets , it isimportant to explore the theory behind avalanchebreakdown and to understand the Design and rating ofrugged mosfets .

6 Several different Avalanche ratings areexplained and their usefulness and limitations in Design Mode DefinedAll semiconductor devices are rated for a certain voltage (BVDSS for Power mosfets ). Operationabove this threshold will cause high electric fields inreversed biased p-n junctions. Due to impact ionization, thehigh electric fields create electron-hole pairs that undergo amultiplication effect leading to increased current. Thereverse current flow through the device causes high powerdissipation, associated temperature rise, and potentialdevice Occurrences In Industry ApplicationsFlyback Converter CircuitSome designers do not allow for Avalanche operation;instead, a voltage derating is maintained between ratedBVDSS and VDD (typically 90 % or less).

7 In such instances,however, it is not uncommon that greater than planned forvoltage spikes can occur, so even the best designs mayencounter an infrequent Avalanche event. One suchexample, a flyback converter, is shown in figures 1 to 3. Fig. 1 - Flyback Converter CircuitDuring MOSFET operation of the flyback converter, energyis stored in the leakage inductor. If the inductor is notproperly clamped, during MOSFET turnoff the leakageinductance discharges through the primary switch and maycause Avalanche operation as shown in the VDS, ID, and VGSvs.

8 Time waveforms in figures 2 and 3. Fig. 2 - Flyback Converter Switch Under Avalanche Waveform Fig. 3 - Flyback Converter Switch Under Avalanche Waveform (Detail)Note Red (VDS), Blue (ID), Black (VGS)In this application, built in Avalanche capability is anadditional Power MOSFET feature and safeguards againstunexpected voltage over-stresses that may occur at thelimits of circuit leakageVDS VGS ID VDS VGS ID AvalancheOperationPower MOSFET Avalanche Design GuidelinesAPPLICATION NOTEA pplication Note Siliconix Revision: 06-Dec-114 Document Number: 90160 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE.

9 THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENTARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT FAILURE MODESome Power semiconductor devices are designed towithstand a certain amount of Avalanche current for a limitedtime and can, therefore, be Avalanche rated. Others will failvery quickly after the onset of Avalanche . The difference inperformance stems from particular device physics, Design ,and MOSFET Device PhysicsAll semiconductor devices contain parasitic componentsintrinsic to the physical Design of the device. In powerMOSFETs, these components include capacitors due todisplaced charge in the junction between p and n regions,resistors associated with material resistivity, a body diodeformed where the p+ body diffusion is made into the n-epi-layer, and an NPN (bi-polar junction transistorhenceforth called BJT) sequence (BJT) formed where the n+source contact is diffused.

10 See figure 4 for Power MOSFET cross section that incorporates the parasitic componentslisted above and figure 5 for a complete circuit model of thedevice. Fig. 4 - Power MOSFET Cross Section Fig. 5 - Power MOSFET Circuit ModelIn Avalanche , the p-n junction acting as a diode no longerblocks voltage. With higher applied voltage a critical field isreached where impact ionization tends to infinity and carrierconcentration increases due to Avalanche to the radial field component, the electric field inside thedevice is most intense at the point where the junction strong electric field causes maximum current flow inclose proximity to the parasitic BJT, as depicted in figure 6below.


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