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Qucs - A Tutorial

QucsA TutorialGetting Started with QucsStefan JahnJuan Carlos Borr asCopyrightc 2007 Stefan 2007 Juan Carlos Borr is granted to copy, distribute and/or modify this document under theterms of the GNU Free Documentation License, Version or any later versionpublished by the Free Software Foundation. A copy of the license is included inthe section entitled GNU Free Documentation License .IntroductionThe following sections are meant to give an overview about what the qucs softwarecan be used for and how it is used to achieve is free software licensed under the General Public License (GPL). It can bedownloaded comes with the completesource code. Every user of the program is allowed and called upon (on a voluntarybasis of course) to modify it for their purposes as long as changes are made the authors to verify them and finally to incorporate it into the software is available for a variety of operating systems including GNU/Linux Windows FreeBSD MacOS NetBSD SolarisOn the homepage you ll find the source code to

in the dataset after simulation the user need to label the wire. This is done by double clicking the wire and given an appropriate name. Wire labelling can also be issued using the icon in the toolbar, by pressing the Ctrl + L shortcut or by choosing the Insert !Wire Label menu entry. Figure 9: …

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Transcription of Qucs - A Tutorial

1 QucsA TutorialGetting Started with QucsStefan JahnJuan Carlos Borr asCopyrightc 2007 Stefan 2007 Juan Carlos Borr is granted to copy, distribute and/or modify this document under theterms of the GNU Free Documentation License, Version or any later versionpublished by the Free Software Foundation. A copy of the license is included inthe section entitled GNU Free Documentation License .IntroductionThe following sections are meant to give an overview about what the qucs softwarecan be used for and how it is used to achieve is free software licensed under the General Public License (GPL). It can bedownloaded comes with the completesource code. Every user of the program is allowed and called upon (on a voluntarybasis of course) to modify it for their purposes as long as changes are made the authors to verify them and finally to incorporate it into the software is available for a variety of operating systems including GNU/Linux Windows FreeBSD MacOS NetBSD SolarisOn the homepage you ll find the source code to build and install the software.

2 Buildinstructions are given. Also links for binary packages for certain distributions ( , SuSE, Fedora) can be the software has been successfully installed on your system you can start itby issuing the# qucscommand or by clicking the appropriate icon on your start menu or desktop. Qucsis a multi-lingual program. So depending on your system s language settings theQucs graphical user interface (GUI) appears in different 1: qucs has been startedOn the left hand side you find theProjectsfolder opened. Usually the projectsfolder will be empty if you use qucs for the first time. The large area on theright hand side is the schematic area. Above you can find the menu bar and theFile Application Settingsmenu the user can configure the languageand appearance of 2: Application setting dialogTo take effect of the language and font settings the application must be closedeither via theCtrl+Qshortcut or theFile Exitmenu entry.

3 Then startQucs suiteQucs consists of several standalone programs interacting with each other throughthe GUI. There are the GUI itself,The GUI is used to create schematics, setup simulations, display simulationresults, writing VHDL code, etc. the backend analogue simulator,The analogue simulator is a command line program which is run by the GUIin order to simulate the schematic which you previously setup. It takes anetlist, checks it for errors, performs the required simulation actions andfinally produces a dataset. a simple text editor,The text editor is used to display netlists and simulation logging informa-tions, also to edit files included by certain components ( SPICE netlists,or Touchstone files).

4 A filter synthesis application,The program can be used to design various types of a transmission line calculator,The transmission line calculator can be used to design and analyze differenttypes of transmission lines ( microstrips, coaxial cables). a component library,The component library manager holds models for real life devices ( tran-sistors, diodes, bridges, opamps). It can be extended by the user. an attenuator synthesis application,The program can be used to design various types of passive attenuators. a command line conversion programThe conversion tool is used by the GUI to import and export datasets, netlistsand schematics from and to other CAD/EDA software. The supported fileformats as well as usage information can be found on the manpage the GUI steers other EDA tools.

5 For digital simulations (via VHDL)the program FreeHDL ( ) is used. And forcircuit optimizations ASCO ( ) is configuredand up schematicsThe following sections will enable the user to setup some simple schematics. Forthis we first create a new project named WorkBook . Either press theNewbutton above the projects folder or use the menu entryProject New Projectand enter the new project 3: New project dialogConfirm the dialog by pressing the Create button. When done, the project isopened and qucs switches to 4: New empty project has been createdIn theContenttab you will find all data related to the project. It containsyour schematics, the VHDL files, data display pages, datasets as well as any otherdata ( datasheets).

6 On the right hand side an untitled and empty schematicwindow is you can start to edit the schematic. The available components can be foundin 5: Components tabIn fig. 5 is shown when clicking theComponentstab. There are lumped com-ponents ( resistors, capacitors), sources ( DC and AC sources), transmis-sion lines ( microstrip, coaxial cable, twisted pair), nonlinear components ( opamp, transistors), digital components ( flip-flops), file components ( files, SPICE files), simulations ( AC or DC analysis), diagrams ( or polar plot) and paintings ( texts, arrows, circles).Each of the components can placed on the schematic by clicking it once, then movethe mouse cursor onto the schematic and click again to put it on its final the mouse move you can right click in order to rotate the component intoits final position.

7 The user can also drag-and-drop the simulation - A voltage dividerThe DC analysis is a steady state analysis. It computes the node voltage as wellas branch currents of the complete circuit. The given circuit in fig. 6 is going todivide the voltage of a DC voltage source according to the resistor 6: Components of the voltage divider place in the schematic areaWiring componentsNow you need to connect the components appropriately. This is done using thewiring tool. You enable the wiring mode either by clicking the wire icon or bypressing theCtrl+Eshortcut. Left clicking on the components ports (smallred circles) starts a wire, clicking on a second port finishes the wire.

8 In order tochange the orientation of the wire right click it. You can leave the wiring mode bythe 7: Components of the voltage divider appropriately wiredFor any analogue simulation (including the DC simulation ) there is a referencepotential required (for the nodal analysis). The ground symbol can be found intheComponentstab in thelumped componentscategory. The user can alsochoose the ground symbol icon or simply press theCtrl+Gshortcut. In thegiven circuit in fig. 8 the ground symbol is placed at the negative terminal of theDC voltage simulation blocksThe type of simulation which is performed must also be placed on the choose the DC simulation block which can be found in theComponentstab in 8: Ground symbol as well as DC simulation in placeLabelling wiresIf you want the voltage between the two resistors (the divided voltage) be outputin the dataset after simulation the user need to label the wire.

9 This is done bydouble clicking the wire and given an appropriate name. Wire labelling can alsobe issued using the icon in the toolbar, by pressing theCtrl+Lshortcut or bychoosing theInsert Wire Labelmenu 9: Node label dialogThe dialog is ended by pressing theEnterkey of pressing the Ok the complete schematic for the voltage divider is ready and can be can by achieved by choosing theFile Savemenu entry, clicking the singledisk icon or by pressing theCtrl+ 10: File save dialogFigure 11: Final voltage divider schematic10 The final DC voltage divider is shown in fig. a simulationThe schematic can now be simulated. This is started by choosing theSimulation Simulatemenu entry, clicking the simulation button (the gearwheel) or bypressing 12: Empty data display after simulation finishedAfter the simulation has been finished the related data display is shown (see ).

10 Also theComponentstab has changed its category to diagrams .Placing diagramsChoose the tabular (list of values) diagram and place it on the data display dropping the tabular, the diagram dialog appears as shown in fig. 13: Diagram dialogBy double clicking graph ( values in a tabular plot) is addedto the diagram. Beside the node the current through theDC voltage available. Only items listed in the dataset list can beput into the dataset itemsDepending on the type of simulation the user performed you find the followingtypes of items in the dataset. DC voltage at nodenode DC current through componentname AC voltage at nodenode AC current through componentname AC noise voltage at nodenode AC noise current through componentname transient voltage at nodenode transient current through componentname12 S[1,1] S-parameter valuePlease note that all voltages and currents are peak values and all noise voltagesare RMS values at 1Hz 14: Diagram dialog with the node voltage addedDepending on the type of graph you have various options to choose for the a tabular graph there is the the number precision as well as type of numbernotation (important for complex values).


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