RM0008 Reference manual - SourceForge

1 October 2011 Doc ID 13902 Rev 141/1096RM0008 Reference manualSTM32F101xx, STM32F102xx, STM32F103xx, STM32F105xxand STM32F107xx advanced ARM-based 32-bit MCUsIntroductionThis Reference manual targets application developers. It provides complete information on how to use the STM32F101xx, STM32F102xx, STM32F103xx and STM32F105xx/STM32F107xx microcontroller memory and peripherals. The STM32F101xx, STM32F102xx, STM32F103xx and STM32F105xx/STM32F107xx will be referred to as STM32F10xxx throughout the document, unless otherwise STM32F10xxx is a family of microcontrollers with different memory sizes, packages and ordering information, mechanical and electrical device characteristics please refer to the low-, medium-, high- and XL-density STM32F101xx and STM32F103xx datasheets, to the low- and medium-density STM32F102xx datasheets and to the STM32F105xx/STM32F107xx connectivity line information on programming.

2 Erasing and protection of the internal Flash memory please refer to: PM0075, the Flash programming manual for low-, medium- high-density and connectivity line STM32F10xxx devices PM0068, the Flash programming manual for XL-density STM32F10xxx information on the ARM Cortex -M3 core, please refer to the STM32F10xxx Cortex -M3 programming manual (PM0056).Related documentsAvailable from : STM32F101xx, STM32F102xx, STM32F103xx, STM32F105xx/STM32F107xx and datasheets STM32F10xxx Cortex -M3 programming manual (PM0056) STM32F10xxx Flash programming manual (PM0075) STM32F10xxx XL-density Flash programming manual (PM0068) ContentsRM00082/1096 Doc ID 13902 Rev 14 Contents1 Overview of the manual .

3 402 Documentation conventions .. of abbreviations for registers .. availability .. 463 Memory and bus architecture .. architecture .. organization .. map .. SRAM .. banding .. Flash memory .. configuration .. 604 CRC calculation unit .. introduction .. main features .. functional description .. registers .. register (CRC_DR) .. data register (CRC_IDR) .. register (CRC_CR) .. register map .. 645 Power control (PWR) .. supplies .. A/D and D/A converter supply and Reference voltage .. backup domain.

4 Regulator .. supply supervisor .. on reset (POR)/power down reset (PDR) .. 68RM0008 ContentsDoc ID 13902 Rev 143/1096 voltage detector (PVD) .. modes .. down system clocks .. clock gating .. mode .. mode .. mode .. (AWU) from low-power mode .. control registers .. control register (PWR_CR) .. control/status register (PWR_CSR) .. register map .. 786 Backup registers (BKP) .. introduction .. main features .. functional description .. detection .. calibration .. registers .. data register x (BKP_DRx) (x = 1.)

5 42) .. clock calibration register (BKP_RTCCR) .. control register (BKP_CR) .. control/status register (BKP_CSR) .. register map .. 837 Low-, medium-, high- and XL-density reset and clockcontrol (RCC) .. reset .. reset .. domain reset .. clock .. clock .. 93 ContentsRM00084/1096 Doc ID 13902 Rev clock .. clock .. clock (SYSCLK) selection .. security system (CSS) .. clock .. clock .. capability .. registers .. control register (RCC_CR) .. configuration register (RCC_CFGR) .. interrupt register (RCC_CIR).

6 Peripheral reset register (RCC_APB2 RSTR) .. peripheral reset register (RCC_APB1 RSTR) .. peripheral clock enable register (RCC_AHBENR) .. peripheral clock enable register (RCC_APB2 ENR) .. peripheral clock enable register (RCC_APB1 ENR) .. domain control register (RCC_BDCR) .. register (RCC_CSR) .. register map .. 1198 Connectivity line devices: reset and clock control (RCC) .. reset .. reset .. domain reset .. clock .. clock .. clock .. clock .. clock (SYSCLK) selection .. security system (CSS) .. clock .

7 clock .. capability .. registers .. 129RM0008 ContentsDoc ID 13902 Rev 145/1096 control register (RCC_CR) .. configuration register (RCC_CFGR) .. interrupt register (RCC_CIR) .. peripheral reset register (RCC_APB2 RSTR) .. peripheral reset register (RCC_APB1 RSTR) .. Peripheral clock enable register (RCC_AHBENR) .. peripheral clock enable register (RCC_APB2 ENR) .. peripheral clock enable register (RCC_APB1 ENR) .. domain control register (RCC_BDCR) .. register (RCC_CSR) .. peripheral clock reset register (RCC_AHBRSTR).

8 Configuration register2 (RCC_CFGR2) .. register map .. 1529 General-purpose and alternate-function I/Os (GPIOs and AFIOs) .. functional description .. I/O (GPIO) .. bit set or reset .. interrupt/wakeup lines .. functions (AF) .. remapping of I/O alternate functions .. locking mechanism .. configuration .. configuration .. function configuration .. configuration .. configurations for device peripherals .. registers .. configuration register low (GPIOx_CRL) (x= ) .. configuration register high (GPIOx_CRH) (x= ).

9 Input data register (GPIOx_IDR) (x= ) .. output data register (GPIOx_ODR) (x= ) .. bit set/reset register (GPIOx_BSRR) (x= ) .. bit reset register (GPIOx_BRR) (x= ) .. configuration lock register (GPIOx_LCKR) (x= ) .. function I/O and debug configuration (AFIO) .. OSC32_IN/OSC32_OUT pins as GPIO ports PC14/PC15 .. 170 ContentsRM00086/1096 Doc ID 13902 Rev OSC_IN/OSC_OUT pins as GPIO ports PD0/PD1 .. alternate function remapping .. alternate function remapping .. alternate function remapping .. alternate function remapping .. alternate function remapping.

10 Alternate function remapping .. alternate function remapping .. alternate function remapping .. alternate function remapping .. alternate function remapping .. registers .. control register (AFIO_EVCR) .. remap and debug I/O configuration register (AFIO_MAPR) .. interrupt configuration register 1 (AFIO_EXTICR1) .. interrupt configuration register 2 (AFIO_EXTICR2) .. interrupt configuration register 3 (AFIO_EXTICR3) .. interrupt configuration register 4 (AFIO_EXTICR4) .. remap and debug I/O configuration register2 (AFIO_MAPR2) .. and AFIO register maps.