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SH7786グループ アプリケーションノート PCI …

SH7786 PCI express (PCIEC) SH7786 PCI express SH7786 1..2 ..2 ..2 ..3 ..5 ..6 2. PCI express (PCIEC)..7 ..7 ..12 PCIEC ..13 PCI express ..14 PI/O PCIEC ..17 PCIEC ..23 DMA ..28 3. (SCIF0)..33 4..34 SH7786 ..34 PCI express Root port ..35 PCI express End point ..35 ..36 ..37 ..37 ..38 ..39 ..58 5..110 ..110 R01AN0557JJ0100 Page 1 of 111 SH7786 SH7786 PCI express (PCIEC) R01AN0557JJ0100 Page 2 of 111

アプリケーションノート SH7786 グループ R01AN0557JJ0100 Rev1.02 SH7786 PCI Express コントローラ(PCIEC)初期化設定例 2011.04.27 要旨 この資料は,SH7786 のPCI Express コントローラの初期設定に必要な設定例を示します。

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Transcription of SH7786グループ アプリケーションノート PCI …

1 SH7786 PCI express (PCIEC) SH7786 PCI express SH7786 1..2 ..2 ..2 ..3 ..5 ..6 2. PCI express (PCIEC)..7 ..7 ..12 PCIEC ..13 PCI express ..14 PI/O PCIEC ..17 PCIEC ..23 DMA ..28 3. (SCIF0)..33 4..34 SH7786 ..34 PCI express Root port ..35 PCI express End point ..35 ..36 ..37 ..37 ..38 ..39 ..58 5..110 ..110 R01AN0557JJ0100 Page 1 of 111 SH7786 SH7786 PCI express (PCIEC) R01AN0557JJ0100 Page 2 of 111 1.

2 PCI express PCIEC (LBSC) DDR3-SDRAM (DBSC3) PCI express PCIEC PCI express PCIEC PCI express Root port End point PCI express Root port PCI express End point VenderID DeviceID DMA PCI express End point VenderID DeviceID PCI express PCIEC z (LBSC) z DDR3-SDRAM (DBSC3) z PCI express (PCIEC) z (SCIF0) (LBSC) DDR3-SDRAM (DBSC3) SH7786 SH7786 (R01AN0242JJ0101) SH7786 (R01AN0242JJ0101) (LBSC) DDR3-SDRAM (DBSC3) SH7786 SH7786 PCI express (PCIEC) R01AN0557JJ0100 Page 3 of 111 AP-AH4AD-0A 1 CPU SH7786 533 MHz SuperHyway 267 MHz 44 MHz DDR3 533 MHz 89 MHz 3 (MD0=High, MD1=High, MD2=Low, MD3=Low) (MD8=High)

3 29 (MD10=Low) 0 16bit (MD4=Low, MD5=High, MD6=Low) NOR Flash 16M ( 0) Spansion S29GL128P90 TFIRI DDR3-SDRAM 256M ( 2 5) Micron MT41J64M16LA-187E (2 ) PCI express SH7786 PCI express PCIEC PCI express Base Specification PCI express Generation1 Root port PCI express x4 1 End point PCI express x1 1 SH7786 SCIF ch0 (115200bps) PC-USB-02A( ) 2 TTL USB Super-H RISC engine Standard Toolchain ( 3) -cpu=sh4a -endian=little -include="$(PROJDIR) inc","$(PROJDIR) inc drv" -define=CONFIG_PCIE_ROOT=0 -object="$(CONFIGDIR) $(FILELEAF).

4 Obj" -debug -gbr=auto -chgincpath -errorpath -global_volatile=0 -opt_range=all -infinite_loop=0 -del_vacant_loop=0 -struct_alloc=1 -nologo -cpu=sh4a -endian=little -round=zero -denormalize=off -include="$(PROJDIR) inc" -debug -object="$(CONFIGDIR) $(FILELEAF).obj" -literal=pool,branch,jump,return -nolist -nologo -chgincpath -errorpath -noprelink -rom=D=R -nomessage -list= "$(CONFIGDIR) $(PROJECTNAME).map" -optimize=safe -start=INTH andler,VECTTBL,INTTBL,IntPRG/0800, PResetPRG/01000,P,C,C$BSEC,C$DSEC,D/0200 0, RSTH andler,PnonCACHE/0A0000000,B,R/0 ADF00000, S/0 ADFF0000 -nologo ( 1) AP-SH4AD-0A AP-SH4AD-0A Hardware Manual ( 2) PC-USB-02A AP-SH4AD-0A Hardware Manual ( 3) PCI express PCIEC PCI express Root port CONFIG_PCIE_ROOT=0 PCI express (PCIEC) PCI express End point CONFIG_PCIE_END=1 SH7786 SH7786 PCI express (PCIEC)

5 R01AN0557JJ0100 Page 4 of 111 ( ) INTH andler / ROM VECTTBL ROM INTTBL ROM IntPRG ROM 0x00000800 PResetPRG ROM 0x00001000 P ROM C ROM C$BSEC ROM C$DSEC ROM D ROM 0x00002000 P0 ( MMU ) RSTH andler ROM PnonCACHE ( ) ROM 0xA0000000 B RAM R RAM 0xADF00000 S RAM 0xADFF0000 P2 ( MMU ) SH7786 SH7786 PCI express (PCIEC) R01AN0557JJ0100 Page 5 of 111 z PCI express PCI express PCI-SIG PCI 32bit PCI PCI express 1 PCI express Base Specification ( Gen 1 )

6 1 2 x2 4 x4 z PCI express Root port PCI express Root port PCI express PCI express PCI express Root port PCI express Root port z PCI express End point PCI express End point Root port PCI express End point Root port End point z I/O PCI I/O z PCI z PCI 4096 256 PCI 3840 PCI express PCI express SH7786 SH7786 PCI express (PCIEC)

7 R01AN0557JJ0100 Page 6 of 111 PCI express PCIEC PCI express PCIEC PCI express Root port End point PCI express Root port PCI express End point VenderID DeviceID DMA PCI express End point VenderID DeviceID PCI express PCIEC PCI express PCIEC INTx/MSI L0 L0s L1 L3 SH7786 SH7786 PCI express (PCIEC) R01AN0557JJ0100 Page 7 of 111 2.

8 PCI express (PCIEC) PCI express PCIEC PCI express SH7786 (SuperHyway ) PCI express PCI PCIEC PCIEC SH7786 (RJJ09B0533) 13 PCI express (PCIEC) (1) PCI express PCIEC PCI express Root port End point I/O - I/O - * - - - - - * * * * PCIEC PCI express * PCIEC SH7786 SH7786 PCI express (PCIEC)

9 R01AN0557JJ0100 Page 8 of 111 (2) PCI express PCIEC Vender Defined Message PCI express Root port End point Assert_INTA Assert_INTB Assert_INTC Assert_INTD Deassert_INTA Deassert_INTB Deassert_INTC Deassert_INTD PME_Active_State_Nak PM_PME PME_Turn_Off PME_To_Ack ERR_COR ERR_NONFATAL ERR_FATAL Unlock Set_Slot_Power_Limit Vender_Define Type0 Vender_Define Type1

10 PCIEC PCI express PCIEC SH7786 SH7786 PCI express (PCIEC) R01AN0557JJ0100 Page 9 of 111 (3) PCI express PCIEC BIST ROM PCI express PCIEC Root port End pointVender ID PCICONF0[15:0] Device ID PCICONF0[31:16] PCICONF1[15:0] PCICONF1[31:16] ID PCICONF2[7:0] PCICONF2[31:8] PCICONF3[7:0] PCICONF3[15:8] PCICONF3[23:16] BIST PCICONF3[31:24] 0 PCICONF4[31:0] 1 PCICONF5[31:0] 2 PCICONF6[31:0] PCICONF6[7:0] PCICONF6[15:8] PCICONF6[23:16] PCICONF6[31:24] 3 PCICONF7[31:0] I/O PCICONF7[7:0] I/O PCICONF7[15:8] PCICONF7[23.]


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