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SN74LVC125A Quadruple Bus Buffer Gate With 3-State …

2A2Y2OE1A1Y1OE4A4Y4OE3A3Y3 OEProductFolderSample &BuyTechnicalDocumentsTools &SoftwareSupport &CommunitySN74 LVC125 ASCAS290Q JANUARY1993 REVISEDJANUARY2015SN74 LVC125 AQuadrupleBus BufferGate With 3-StateOutputs1 Features3 DescriptionThis quadruplebus buffergateis designedfor 3-StateOutputsto SeparateOE for all 4 buffersThe SN74 LVC125 Adevicefeaturesindependentline to Vdriverswith disabled SpecifiedFrom 40 C to 85 Cwhenthe associatedoutput-enable(OE) inputis 40 C to 125 CTo ensurethe high-impedancestateduringpowerup InputsAcceptVoltagesto Vor powerdown,OE shouldbe tied to VCCthrougha Max tpdof ns at Vpullupresistor;the minimumvalueof the resistorisdeterminedby the current-sinkingcapabilityof the TypicalVOLP(OutputGroundBounce)driver.

SN74LVC125A Quadruple Bus Buffer Gate With 3-State Outputs 1 Features 3 Description This quadruple bus buffer gate is designed for 1.65-V 1• 3-State Outputs to 3.6-V VCC operation. • Separate OE for all 4 buffers • Operates From 1.65 V to 3.6 V The SN74LVC125A device features independent line drivers with 3-state outputs. Each output is ...

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Transcription of SN74LVC125A Quadruple Bus Buffer Gate With 3-State …

1 2A2Y2OE1A1Y1OE4A4Y4OE3A3Y3 OEProductFolderSample &BuyTechnicalDocumentsTools &SoftwareSupport &CommunitySN74 LVC125 ASCAS290Q JANUARY1993 REVISEDJANUARY2015SN74 LVC125 AQuadrupleBus BufferGate With 3-StateOutputs1 Features3 DescriptionThis quadruplebus buffergateis designedfor 3-StateOutputsto SeparateOE for all 4 buffersThe SN74 LVC125 Adevicefeaturesindependentline to Vdriverswith disabled SpecifiedFrom 40 C to 85 Cwhenthe associatedoutput-enable(OE) inputis 40 C to 125 CTo ensurethe high-impedancestateduringpowerup InputsAcceptVoltagesto Vor powerdown,OE shouldbe tied to VCCthrougha Max tpdof ns at Vpullupresistor;the minimumvalueof the resistorisdeterminedby the current-sinkingcapabilityof the TypicalVOLP(OutputGroundBounce)driver.

2 < V at VCC= V, TA= 25 C TypicalVOHV(OutputVOHU ndershoot)Inputscan be 5-V devices.> 2 V at VCC= V, TA= 25 CThisfeatureallowsthe useof thisdeviceas atranslatorin a Latch-UpPerformanceExceeds250 mAPer JESD17 DeviceInformation(1) ESDP rotectionExceedsJESD22 PARTNUMBERPACKAGE(PIN)BODYSIZE 2000-VHuman-BodyModelSOIC(14) 200-VMachineModelSSOP(14) (14) 1000-VCharged-DeviceModelTSSOP(14) (14) Applications(1) For all availablepackages,see the orderableaddendumat CableModemTerminationSystemsthe end of the datasheet. IP Phones:Wiredand Wireless OpticalModules4 SimplifiedSchematic OpticalNetworking: EPONor VideoOverFiber Point-to-PointMicrowaveBackhaul Power:TelecomDC/DCModules: Analogor Digital PrivateBranchExchanges(PBX) TETRABaseStations TelecomBaseBandUnits TelecomShelters: FilterUnit s PowerDistributionUnits(PDU) PowerMonitoringUnits(PMU) WirelessBatteryMonitoring RemoteElectricalTilt Units(RET) RemoteRadioUnits(RRU) TowerMountedAmplifiers(TMA) VectorSignalAnalyzersand Generators VideoConferencing.

3 IP-BasedHD WiMAXand WirelessInfrastructureEquipment WirelessCommunicationsTesters xDSLM odemsand DSLAM1An IMPORTANTNOTICEat the end of this datasheetaddressesavailability,warranty, changes,use in safety-criticalapplications,intellectual propertymattersand JANUARY1993 Applicationand Pin Configurationand Deviceand Mechanical,Packaging,and Orderable8 RevisionHistoryChangesfromRevisionP (October2010)to RevisionQPage AddedApplications,DeviceInformationtable ,Pin Functionstable,ESDR atingstable,ThermalInformationtable,Typi calCharacteristics,FeatureDescriptionsec tion,DeviceFunctionalModes,Applicationan d Implementationsection,PowerSupplyRecomme ndationssection,Layoutsection,Deviceand DocumentationSupportsection,andMechanica l,Packaging,and 1993 2015,TexasInstrumentsIncorporatedProduct FolderLinks.

4 SN74 LVC125AD, DB, NS, OR PW PACKAGE(TOP VIEW)12345671413121110981OE1A1Y2OE2A2 YGNDVCC4OE4A4Y3OE3A3 YRGY PACKAGE(TOP VIEW) JANUARY1993 REVISEDJANUARY20156 Pin Configurationand FunctionsPin FunctionsPINTYPEDESCRIPTIOND, DB, NS, PWNAMEand RGY1A2 IInput1OE1 IOutputenable1Y3 OOutput2A5 IInput2OE4 IOutputenable2Y6 OOutput3A9 IInput3OE10 IOutputenable3Y8 OOutput4A12 IInput4OE13 IOutputenable4Y11 OOutputGND7 GroundVCC14 PowerpinCopyright 1993 2015,TexasInstrumentsIncorporatedSubmitD ocumentationFeedback3 ProductFolderLinks:SN74 LVC125 ASN74 LVC125 ASCAS290Q JANUARY1993 (unlessotherwisenoted)(1)MINMAXUNITVCCS upplyvoltagerange (2) (2)(3) + < 0 50mAIOKO utputclampcurrentVO< 0 50mAIOC ontinuousoutputcurrent 50mAContinuouscurrentthroughVCCor GND 100mAPtotPowerdissipationTA= 40 C to 125 C(4)(5)500mWTstgStoragetemperaturerange 65150 C(1)

5 StressesbeyondthoselistedunderAbsoluteMa ximumRatingsmay causepermanentdamageto the stressratingsonly,and functionaloperationof the deviceat theseor any otherconditionsbeyondthoseindicatedunder RecommendedOperatingConditionsis not absolute-maximum-ratedconditionsfor extendedperiodsmay affectdevicereliability.(2)The inputand outputnegative-voltageratingsmay be exceededif the inputand outputcurrentratingsare observed.(3)The valueof VCCis providedin theRecommendedOperatingConditionstable.( 4)For the D package:above70 C, the valueof Ptotderateslinearlywith 8 mW/K.(5)For the DB, NS, and PW packages:above60 C, the valueof Ptotderateslinearlywith (HBM),per ANSI/ESDA/JEDECJS-001,all pins(1)2000 ElectrostaticV(ESD)VChargeddevicemodel(C DM),per JEDEC specificationJESD22-C101,alldischarge100 0pins(2)(1)JEDEC documentJEP155statesthat 500-VHBM allowssafe manufacturingwith a standardESDcontrolprocess.

6 (2)JEDEC documentJEP157statesthat 250-VCDM allowssafe manufacturingwith a 1993 2015, JANUARY1993 (unlessotherwisenoted)(1)TA= 25 C 40 C to 85 C 40 C to 125 to VCCHigh-levelVIHVCC= V to V to V222 VCC= to VCCLow-levelVILVCC= V to V to 4 4 4 VCC= V 8 8 8 High-levelIOHmAoutputcurrentVCC= V 12 12 12 VCC= 3 V 24 24 24 VCC= V888 Low-levelIOLmAoutputcurrentVCC= V121212 VCC= 3 V242424 t/ vInputtransitionrise or fall rate888ns/V(1)All unusedinputsof the devicemustbe held at VCCor GNDto the TI applicationreport,Implicationsof Slowor FloatingCMOSI nputs, (2)DB(2)NS(2)PW(2)RGY(3)THERMALMETRIC(1) UNIT14 PINSR JAJunction-to-ambientthermalresistance86 967611347 C/W(1)For moreinformationabouttraditionaland new thermalmetrics,see theIC PackageThermalMetricsapplicationreport,S PRA953.

7 (2)The packagethermalimpedanceis calculatedin accordancewith JESD51-7.(3)The packagethermalimpedanceis calculatedin accordancewith 1993 2015,TexasInstrumentsIncorporatedSubmitD ocumentationFeedback5 ProductFolderLinks:SN74 LVC125 ASN74 LVC125 ASCAS290Q JANUARY1993 (unlessotherwisenoted)TA= 25 C 40 C to 85 C 40 C to 125 toIOH= 100 AVCC VIOH= 4 8 12 mA3 24 mA3 toIOL= 100 VIOL= 4 8 12 24 mA3 V or V 1 5 20 AIOZVO= VCCor V 1 10 20 AICCVI= VCCor GND,IO= V11040 AOne inputat VCC V, V to ICC5005005000 AOtherinputsat VCCor VCiVI= VCCor (unlessotherwisenoted)(seeFigure3)TA= 25 C 40 C to 85 C 40 C to 125 CFROMTOPARAMETERVCCUNIT(INPUT)(OUTPUT) V V V V V V V V V (o)

8 V 25 gatef = 10 V156 SubmitDocumentationFeedbackCopyright 1993 2015,TexasInstrumentsIncorporatedProduct FolderLinks:SN74 LVC125A2468101214050100150200250300CL Load Capacitance pFVCC= 3 V,TA= 25 COne Output SwitchingFour Outputs Switchingt Propagation Delay Time nspd246810050100150200250300CL Load Capacitance pFt Propagation Delay Time nspdVCC= 3 V,TA= 25 COne Output SwitchingFour Outputs JANUARY1993 PropagationDelay(Lowto HighTransition)Figure2. PropagationDelay(Highto LowTransition)vs LoadCapacitancevs LoadCapacitanceCopyright 1993 2015,TexasInstrumentsIncorporatedSubmitD ocumentationFeedback7 ProductFolderLinks.

9 SN74 LVC125 AVMthtsuFrom OutputUnder TestCL(see Note A)LOAD CIRCUITS1 VLOADOpenGNDRRLLData InputTiming InputVI0 VVI0 V0 VtInputwVOLTAGE WAVEFORMSSETUP AND HOLD TIMESVOLTAGE WAVEFORMSPROPAGATION DELAY TIMESINVERTING AND NONINVERTING OUTPUTSVOLTAGE WAVEFORMSPULSE DURATIONtPLHtPHLtPHLtPLHVOHVOHVOLVOLVI0 VInputOutputWaveform 1S1 at VLOAD(see Note B)OutputWaveform 2S1 at GND(see Note B)VOLVOHtPZLtPZHtPLZtPHZVLOAD/20 VVOL+ V VOH- V 0 VVIVOLTAGE WAVEFORMSENABLE AND DISABLE TIMESLOW- AND HIGH-LEVEL ENABLINGO utputOutputtPLH/tPHLtPLZ/tPZLtPHZ/tPZHOp enVLOADGNDTESTS1 NOTES: A. CLincludes probe and jig Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output 2 is for an output with internal conditions such that the output is high, except when disabled by the output All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, ZO= 50.

10 D. The outputs are measured one at a time, with one transition per tPLZand tPHZare the same as tPZLand tPZHare the same as tPLHand tPHLare the same as All parameters and waveforms are not applicable to all V V V V1 k 500 500 500 VCCRL2 VCC2 VCC6 V6 VVLOADCL30 pF30 pF50 pF50 VVV VVVICC/2 VVMt /tr f 2 ns 2 ns ns nsINPUTSSN74 LVC125 ASCAS290Q JANUARY1993 ParameterMeasurementInformationFigure3. LoadCircuitand VoltageWaveforms8 SubmitDocumentationFeedbackCopyright 1993 2015, JANUARY1993 REVISEDJANUARY20159 SN74 LVC125 Adeviceis a quadruplebus buffergatefeaturingindependentline driverswith disabledwhenthe associatedoutput-enable(OE) inputis is low, the respectivegatepassesthe datafromthe A inputto its Y ensurethe high-impedancestateduringpowerup orpowerdown,OE shouldbe tied to VCCthrougha pull-upresistor.


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