Space Applications Electronic Hardware Addendum to IPC …

1 IPC J-STD-001 FSSpace ApplicationsElectronic HardwareAddendum toIPC J-STD-001 FRequirements forSoldered Electrical andElectronic AssembliesDeveloped by the Space Electronic Assemblies J-STD-001 AddendumTask Group (5-22as) of the Assembly & Joining Processes Committee(5-20) of IPCU sers of this publication are encouraged to participate in thedevelopment of future :IPC3000 Lakeside Drive, Suite 309 SBannockburn, Illinois60015-1249 Tel 847 847 Space Applications Electronic Hardware Addendum toIPC J-STD-001F Requirements for SolderedElectrical and Electronic AssembliesTable of ContentsThe following topics are addressed in this or Previously Approved of Lead-Free Lead Free Control Plague (Cuprous Oxide Corrosion)

2 Red Plague Control Plan - Minimum Shipping and Limited Life ArticleThe following reference numbers are to J-STD-001 EClauses that are modified or added in this of Frequency Voltage and Deformation Connection Visible or Hidden Mounting - to Component Termination Requirements forUnsupported Holes7 SURFACE MOUNTING OF Mount Device Lead Component Body or Flattened (Coined) Gull Mount Area Array Termination Components (BTC) with Bottom Thermal PlaneTerminations (D-Pak) Post Solder Object Debris (FOD) Residues and Other Ionic or Exposure/Cut , Encapsulation, Staking or Touchup of - (Adhesive) (Torque/Anti-Tampering)

3 2015 IPC ScopeThis Addendum provides requirements to beused in addition to, and in some cases, in place of, thosepublished in IPC J-STD-001F to ensure the reliability ofsoldered electrical and Electronic assemblies that must sur-vive the vibration and thermal cyclic environments gettingto and operating in PurposeWhen required by procurementdocumentation/drawings, this Addendum supplements orreplaces specifically identified requirements of IPC J-STD-001, Revision F of July PrecedenceThe contract takes precedence overthis Addendum , referenced standards and User-approveddrawings.

4 In the event of a conflict between this Addendumand the applicable documents cited herein, this Addendumtakes precedence. Where referenced criteria of this Adden-dum differ from the published IPC J-STD-001F, thisAddendum takes precedence. In the event of conflictbetween the requirements of this Addendum and the appli-cable assembly drawing(s)/documentation, the applicableUser approved assembly drawing(s)/documentation takeprecedence. See Table 1 of this Addendum , clauses of Precedence and Existing or Previously Approved DesignsThisAddendumshallnotconstitute the sole cause for the rede-sign of previously approved designs.

5 When drawings forexisting or previously approved designs undergo revision,they should be reviewed and changes made that allow forcompliance with the requirements of this UseThis Addendum is not to be used as a stand-alone criteria are not supplemented, the Class 3 require-ments of IPC J-STD-001 Fshallapply. Where IPC J-STD-001F criteria are supplemented or new criteria are added bythis Addendum , the clause is listed in J-STD-001FS, Table1, Space Applications Requirements, and the entire IPCJ-STD-001F clause is replaced by this Addendum except asspecifically clauses modified by this Addendum do not includesubordinate clauses unless specifically stated, , doesnot include Clauses, Tables, Figures, etc.

6 , in IPCJ-STD-001F that are not listed in this Addendum are to beused Lead-Free TinFor the purpose of this document,lead-free tin is defined as tin containing less than 3 percentlead by weight as an alloying constituent. Solder is exempt from this requirement. See Table 1 ofthis Addendum , clause Use of Lead-Free TinThe use of components,assemblies, packaging technology, mechanical Hardware ,and materials meeting any of the following conditionsshallbe prohibited unless documented and controlled through aUser approved Lead Free Control Plan (LFCP) incorporat-ing either a replating or hot solder dip (HSD) process thatcompletely replaces the lead-free tin finish, or a minimumof two mitigation measures.

7 Lead-free tin plating, metallization, etc., on external sur-faces of parts, mechanical parts, etc., or in internal cavitysurfaces, : hybrid, relay crystal cans, MEMS, etc. Any components, printed circuit assemblies (PCAs), etc.,assembled with lead-free tin solder alloys , see paragraph Lead Free Control PlanThe Lead Free ControlPlan (LFCP)shalldocument controls and processes thatassures that assemblies containing lead-free tin solderalloys and/or component finishes will perform as intendedwithin the expected parameters of the mission, , envi-ronment, duration, etc.

8 At a minimum, the LFCP shall:a. Document the use of lead-free tin technology and pre-vent its use without review and approval by the Userprior to Incorporate a minimum of two mitigation measureswhen the lead-free tin finish is not completely replacedthrough a replating or HSD Include any special design requirements, mitigationmeasures, test and qualification requirements, qualityinspection and screening, marking and identification,maintenance, and repair Require review and approval by the User prior following documents may be helpful when develop-ing the LFCP.

9 GEIA-STD-0005-1, Performance Standard for Aerospaceand High Performance Electronic Systems ContainingLead-free Solder GEIA-STD-0005-2, Standard for Mitigating the Effects ofTin Whiskers in Aerospace and High Performance Elec-tronic Systems GEIA-HB-0005-1, Program Management / Systems Engi-neering Guidelines For Managing The Transition ToLead-Free Electronics GEIA-HB-0005-2, Technical Guidelines for Aerospaceand High Performance Electronic Systems ContainingLead-free Solder and Finishes GEIA-STD-0006, Requirements for Using Solder Dip toReplace the Finish on Electronic Piece MitigationComponents, sub-assemblies, assem-blies, and mechanical Hardware identified as having lead-free tin surfaces, plating, metallization, etc.

10 , but which bypackage design or engineering decision are not protectedIPC J-STD-001 FSJanuary 20152