SpecTek NAND Flash Part Numbering System

1 SpecTek reserves the right to change products or specifications without notice. 2006 SpecTek 2006 Micron Technology Inc. All rights reservedSpecTek nand Flash part Numbering System FB M B2*B 512G6 K L B A E J4 - 25 AS SpecTek nand Flash MemoryFN, FT, FB, FX = SpecTekCB = Chip on BoardLast Updated: 10/20/2020 Product MarkingInternal code forLaser Marker. Not applicable for Technology3, M = Single-level cell (SLC)4, L = Multiple-level cell (MLC)B = Triple-level cell (TLC)Q = Quad-level cell (QLC)Configuration L = x16M = x8 (half page, size)P = x16 ECC enabledN = Not available G = x8 ECC enabledH = x1J = x4K = x8 (normal page, size) Process NodeSpeed Grade (max speed)

2 15 = NV-DDR TM3 133MT/s12 = NV-DDR TM4 166MT/s10 = NV-DDR TM5 200MT/s75 = NV-DDR2 TM5 266MT/s6 = NV-DDR2 TM6 333MT/s5 = NV-DDR2 TM7 400MT/sBLANK= See datasheet for specific speed37 = NV-DDR2 TM8 533MT/s3 = NV-DDR3 TM9 666MT/s25 = NV-DDR3 TM10 800MT/s18 = NV-DDR3 TM11 1066MT/s16 = NV-DDR3 TM12 1200MT/sGrade and Product Definition-AS = Full Spec for SSD (100%)-AL = Full Spec for USB/SD and low end SSD (100%)-AF = Full Spec for low end USB/SD (100%)-AR = Relaxed Spec (see Functional Density)-ES = Engineering Sample-MB = Mixed Bins (35%)-PG = Partial Good Mixed Bins (50%)-UT = Untested (80%)-S7 = Partially tested, est yield of 75%-S9 = Partially tested, est yield of 90%-S5 = Partially tested, est yield of 50% (EOL 4/15/19)-S8 = Partially tested, est yield of 85% (EOL 4/15/19)-SG = Simple Test Passers/Extended Test Failures (EOL 4/15/19)-SS = Simple Test Failures (EOL 4/15/19)

3 InterfaceMark ABCDI nterface Async onlyAsync/Sync Sync onlySPII nterfaceMark EFGMNI nterface NV-DDR3 onlyAsync/NV-DDR2/NV-DDR3 Enterprise SyncSIM FlashASYNC/NVDDR21 = 3 = D =E =F =J = L =S =T = Vcc / / / usednot used0V0V0V0V0V0V0 VCodeA B C DEFGH# Die 11322234# CE Pins0 1312231 Num I/O Channels11212131 Package Functionality Partial TypeA = All CE(s) are valid and usableB = CE1 Valid, CE2 not guaranteedC = CE2 Valid, CE1 not guaranteedD = SLC on the fly. Consult factory for more information Package Code with PitchWP = 48-pin TSOP-1 Center Package Leads (CPL) PB free, 12 x 20 x = 48-pin TSOP-1 Off-center Package Leads (OCPL)

4 PB free, 12 x 20 x = 52-pad ULGA, 12 x 17 x = 52-pad VLGA, 12 x 17 x C5 = 52-pad VLGA, 14 x 18 x C6 = 52-pad LLGA, 14 x 18 x C7 = 48-pad LLGA, 12 x 20 x C8 = 52-pad WLGA, 14 x 18 x D1 = 52-pad VLGA, 11 x 14 x = 154/195 ball VFBGA, x x = 154/195 ball LFBGA, x x = 154/195 ball LFBGA, x x = 272/352 ball VFBGA, 14 x 18 x = 272/352 ball LFBGA, 14 x 18 x = 252/308 ball LFBGA, 12 x 18 x = 272/352 ball LFBGA, 14 x 18 x = 272/352 ball LFBGA, 14 x 18 x = 252/308 ball LFBGA, 12 x 18 x = 252/308 ball LFBGA, 12 x 18 x = 252/308 ball LFBGA, 12 x 18 x = 63/120 ball VFBGA x 13 x = 100/170 ball VBGA, 12 x 18 x H2 = 100/170 ball TBGA, 12 x 18 x H3 = 100/170 ball LBGA, 12 x 18 x H4 = 63/120 ball VFBGA, 9 x 11 x = 56/256 ball VFBGA, x x = 152/221 ball VBGA 14 x 18 x = 152/221 ball TBGA 14 x 18 x = 152/221 ball LBGA 14 x 18 x = 132/187 ball VBGA, 12 x 18 x = 132/187 ball TBGA, 12 x 18 x = 132/187 ball LBGA 12 x 18 x = 132/187 ball VBGA 12 x 18 x = 132/187 ball LBGA 12 x 18 x = 132/187 ball TBGA 12 x 18 x = 152/221 ball LBGA 14 x 18 x = 100/170 ball VLGA 12 x 18 x = 100/170 ball TLGA, 12 x 18 x = 152/221 ball LBGA.

5 14 x 18 x = 152/221 ball VLGA 14 x 18 x = 152/221 ball TLGA 14 x 18 x = 132/187 ball VLGA, 12 x 18 x = 132/187 ball TBGA, 12 x 18 x = 132/187 ball LBGA, 12 x 18 x = 130-ball VFBGA, 8 x 9 x = 55-ball VFBGA, 8 x 10 x = 64 Gbit128G = 128 Gbit256G = 256 Gbit384G = 384 Gbit512G = 512 Gbit768G = 768 Gbit1T = 1024 Gbit1T2 = 1152 Gbit ( )1HT = 1536 Gbit ( )2T = 2048 Gbit (2T)3T = 3072 Gbit (3T)4T = 4096 Gbit (4T)6T = 6144 Gbit (6T)8T = 8192 Gbit (8T)16T = 16384 Gbit (16T)Functional Density*Process Node [0, 1, 2, or 3] - potential density VoltageCodeJKLMNPQR# Die 44446888# CE Pins22446842 Num I/O Channels12423242 CodeSTUVWXY1# Die 16168161641116# CE Pins48484472 Num I/O Channels42242241 Code234 # Die 6484# CE Pins84 or 24 Num I/O Channels221 For the previous marketing part number, see the next (Single Die per Package), DDP (Dual Die per Package), QDP (Quad Die per Package), 8DP (Eight Die per Package), 16DP (Sixteen Die per Package)Package Configuration TypeDensity Grade (% of Parent Density)

6 1 = 94 100%9 = 90 100%6 = 50 90%5 = 40 60%0 = BL or S* grade definitionsFor process node values of 6, 7, 8, 9, B, D, or E, see page 2 Note: 1. TM = Timing mode 2. MT/s = Millions of Transfers per secondOld SpecTek nand Flash part Numbering SystemLast Updated: 01/16/18 FNN L63A 5 1 K 3 WG - AFF= SpecTekProduct MarkingInternal code for Laser mark. Not applicable for TechnologyM= Single-level cellL= Multiple-level cellProduct FamilyB, N, T= SpecTek nand FlashGrade and Product DefinitionVoltageB= 100/170B BGA 12x18mm PB freeC= 52-pad ULGA 12x17mm PB freeD= 63/120B VFBGA 9x11mm PB freeG= 52-pad VLGA 12x17x1mm PB freeH= 63/120B VBGA PB freeJ= 48/52-pad SOP/LLGA 12x20mm PB freeL= 52-pad LLGA 14x18mm PB freeP= 48ld TSOP-1 Off-center Package Leads (OCPL) PB freeT= 48ld TSOP-1 PB V= 52-pad VLGA 14x18mm PB freeW= 48ld TSOP-1 Center Package Leads (CPL)

7 PB freePackage Code G= Single Die Package, CE only1= Dual Die Package, CE1 functional only2= Dual Die Package, CE1 and CE2 functional3= Dual Die Package, CE3 functional only4= Quad Die Package, CE1 and CE2 functional5= Quad Die Package, CE1 functional only6= Quad Die Package, CE2 functional only7= Octal Die Package, CE3 functional8= Octal Die Package, CE2/CE3/CE4 functional9= Octal Die Package, CE2/CE4 functionalPackage Functionality Design Generation(Consult factory)-AL= Full Spec -AF= Full Spec-AR= Relaxed Spec-AT= One Time Programmable-AC= No Cache Feature-AW= No Write Protect Feature-AA= No READ ID FeatureK= x8 L= x16 H= x1 Parent Density (2N in Gigabits)

8 Functional DensityProcess Node [B/D/E/2/3/4/5]Density Grade1= 94-100% of Parent Density9= 90-100% of Parent Density6= 50-90% of Parent Density5= 40-60% of Parent DensityA= see, HP, BL, or S* grade definitionsFNN L52A H G K 3 WG - AF**Configuration1=3=D=S= usednot usednot used0V0V-SS= Settle & Ship-S3= 3rd Pass-S7= Untested Settle & Ship-ES= Engineering Sample-HP= Single Plane-SJ= 1st Step Failure-SG= Guardband FailureSpecTek reserves the right to change products or specifications without notice. 2006 SpecTek 2006 Micron Technology Inc. All rights reserved1G= HG= 31= 32= 64= NX= 128Mb8G= NY= 256 MbF8= NZ= 512 MbProcess Node [6/7/8/9]1= 2 Gib2= 4 Gib3= 8 Gib4= 16 Gib5= 32 Gib6= 64 Gib7= 128 Gib8= 256 Gib9= 512 Gib0= 1 GibA= 1024 GibB= 2048 GibN= no density guaranteedSpecTek reserves the right to change products or specifications without notice.

9 2006 SpecTek 2006 Micron Technology Inc. All rights reservedSpecTek nand Flash Wafer/Die Marketing WB S M 49A D C BX NL - 0x E2 A Last Updated: 2/04/2020 Wafer Tape TypeB = D-175 (200mm) C = R-3000/R-3100 D = LE-Z01F = P-2110G (200mm)G = D-175-12P (300mm)H = P-4110G-12P (300mm)N = NA (uncut wafers)U = UnavailableBackside Adhesive (See Next Page)CU Bond Pad TypeA = NI/PDB = NI/AUC = AL CAPD = ALM3E = ALM2F = NI/PD/AUU = UnavailableReticle Grade and Revision0x = 300mm waferNx = 300mm wafer Where x indicates the die s top reticle revision and can be any character between A (oldest) to S (newest).Die ThicknessAA = 790 mAB = 725 mAC = 285 mAD = 280 mAE = 55 mAF = 30 mNA = 100 mNB = 508 mNC = 200 mND = 375 mNE = 305 mNZ = Unknown Die ThicknessNF = 400 mNG = 675 mNH = 500 mNI = 40 mNJ = 750 mNK = 350 mNL = 80 mNM = 175 mNN = 250 mNP = 125 mNQ = 225 mNR = 150 mNS = 510 mNT = 65 mNU = 325 mNV = 90 mNW = 120 mNX = 600 mNY = 265 mN2 = 340 mN3 = 230 mN4 = 75 mN5 = 135 mN6 = 275 mN7 = 70 mN8 = 60 mN9 = 50 mPick GradeE0 = 100%E9 = 90%E8 = 80%E7 = 70%E6 = 60%E5 = 50%E4 = 40%E3 = 30%E2 = 25%E1 = 10%EX = Carcass Die 2%Parent Device/ConfigurationCell TechnologyB = TLCL = MLCM = SLCQ = QLCD evice Generation & Parent Densityx9x = 2 Gbx0x =

10 4 Gbx1x = 8 Gbx2x = 16 Gbx3x = 32 Gbx4x = 64 GbFilm Frame TypeD = DiscoG = Gel PakK = K & SN = NAx5x = 128 Gbx6x = 256 Gbx7x = 512 GbL = 32Mx16M = 128Mx8Q = 64Mx16S = 256Mx8T = 2Mx16V = 512Mx8Y = 128Mx16Z = 256Mx161 = 32Gx82 = 48Gx83 = 64Gx84 = 128Mx85 = 8Mx166 = 768Mx167 = 16Mx88 = 5330Mx8A = 512Mx16U = UnavailableC = 32Mx8D = 16Mx16E = 1Gx8F = 2Gx8G = 4Gx8H = 8Gx8J = 64Mx8K= 16Gx8 PrefixWBWTWCWSWDWFWGWHWMWNWJWKWLWPWQWRWV WWWXWYXX = SPTK PROJECTION MPNP roductDie on frameDie on frameWaferWaferDie on frameDie on frameWaferWaferDie stackedDie stackedDie stackedDie stackedDie on frameWaferDie on frameWaferDie on frameWaferDie on frameWaferSupplyVoltage (VCC) SupplyVoltage (VCCQ) or or or or or or reserves the right to change products or specifications without notice.