Standard Test Method for Sheet Resistance Uniformity ...

1 Designation: F 1529 97 Standard Test Method forSheet Resistance Uniformity evaluation by In-Line Four-Point Probe with the Dual-Configuration Procedure1 This Standard is issued under the fixed designation F 1529; the number immediately following the designation indicates the year oforiginal adoption or, in the case of revision, the year of last revision. A number in parentheses indicates the year of last reapproval. Asuperscript epsilon (e) indicates an editorial change since the last revision or Table corrected editorially and the year date was changed to Dec. 5, test Method uses a four-point probe in a manner different from that of other ASTM methodsfor the measurement of the resistivity or Sheet Resistance of semiconductors.

2 In this test Method , twodifferent ways (configurations) of connecting the probe pins to the electronics that supply current andmeasure voltage are used at each measurement location on the specimen. This use of a four-pointprobe is often referred to as dual-configuration or as configuration switched are three benefits that result from the second measurement configuration at each location: (1)the probe no longer needs to be in a high symmetry orientation on the specimen, that is, beingperpendicular or parallel to the radius on a circular wafer or to the length or width of a rectangularspecimen, as long as it is a modest distance from the edge of the wafer, (2) the lateral dimension(s)of the specimen, and the exact location of the probe on the specimen no longer have to be known thegeometric scaling factor results directly f rom the two sets of electrical measurements at each location,(3)

3 The two sets of measurements self-correct for the actual separations between the probe pins in amanner that has been shown to be more effective than measuring probe impressions made on a pieceof polished material. As a result, high precision measurements can be made with smaller probeseparations than is possible with single configuration use of a four-point probe, thus allowing higherspatial resolution of wafer Sheet Resistance variations.(1)21. This test Method covers the direct measurement of thesheet Resistance and its variation for all but the periphery(amounting to three probe separations) for circular conductinglayers pertinent to silicon semiconductor technology.

4 Theselayers may be fabricated on substrates of any diameter that iscapable of being securely mounted on a prober The equation used to calculate the Sheet Resistance data frommeasurements is not perfectly accurate out to the edge of the wafer forprobes oriented at an arbitrary angle with respect to a wafer , automatic instruments on which this test Method will be per-formed may not have perfect centering of the wafer on the measurementstage. These factors require that the periphery of the layer being measuredbe excluded. Also, many thin film processes use wafer clamps thatpreclude forming layers out to the edge of the substrate.

5 The edgeexclusion in this test Method applies to the film that is being measured,rather than to the substrate. The equation used is based on mathematicsdeveloped for layers of circular shape. It is expected to work well forlayers of other shapes such as rectangular, if edge exclusion requirementsare met; however, the accuracy near the edge of other shapes has not beendemonstrated(2). This test Method is intended primarily for assessing theuniformity of layers formed by diffusion, epitaxy, ion implantand chemical vapor, or other deposition processes on a siliconsubstrate.

6 The deposited film, which may be single crystal,polycrystalline or amorphous silicon, or a metal film, must beelectrically isolated from the substrate. This can be accom-plished if the layer is of opposite conductivity type from thesubstrate or is deposited over a dielectric layer such as silicondioxide. This test Method is capable of measuring films as thinas m, but particular care is required for establishingreliable measurements for most films in the range below m. Films that have a thickness up to half the probe separationcan be measured without the use of a thickness-related correc-tion factor.

7 It may give misleading results for films formed bysilicon on insulator technologies because of charge or chargetrapping in the This test Method can be used to measure the sheetresistance Uniformity of bulk substrates. However, the thick-ness of the substrate must be known to be constant or must be1 This test Method is under the jurisdiction of ASTM Committee F-1 onElectronics and is the direct responsibility of Subcommittee on SiliconMaterials and Process edition approved Dec. 5, 1997. Published February 1998. Originallypublished as F 1529 94. Last previous edition F 1529 boldface numbers in parentheses refer to the list of references at the end ofthis test SOCIETY FOR TESTING AND MATERIALS100 Barr Harbor Dr.

8 , West Conshohocken, PA 19428 Reprinted from the Annual Book of ASTM Standards. Copyright ASTMCOPYRIGHT American Society for Testing and MaterialsLicensed by Information Handling ServicesCOPYRIGHT American Society for Testing and MaterialsLicensed by Information Handling Services - 020-31375051measured at all positions where Sheet Resistance values aremeasured in order to calculate relative variations in The thickness correction factor for layers that are thicker times the probe spacing is known to vary more rapidly than that forsingle-configuration four-probe measurements.

9 But such a correction hasnot yet been published. Until such a correction is published, resistivityvalues determined by the dual-configuration Method will not be accuratefor these thicker specimens; however, if the wafer has uniform thickness,variations of resistivity can still be determined by this test This test Method can be used to measure Sheet resistancevalues from below 10 mVfor metal films, to over 25 000 Vforthin silicon films. However, for films at the upper end of thisresistance range, and for films toward the low end of thethickness range, the interpretation of the Sheet Resistance valuesmay not be straightforward due to various semiconductoreffects(3, 4, 5).

10 NOTE3 The principles of this test Method are also applicable to othersemiconductor materials, but the appropriate conditions and the expectedprecision have not been This test Method uses two different electrical configu-rations of the four-point probe at each measurement location. Itdoes not require measurement of probe location on the wafer,or probe separations, or of wafer diameter (except to determineedge exclusion for measurement-site selection) as do otherfour-point probe methods such as Test Methods F 81, F 84 andF 374. By use of electrical data from the two differentconfigurations at each location, the Method is self-calibratingwith respect to the geometrical parameters(1).