Step by Step Design Tutorial of a fixed-frequency adapter ...

1 step by step Design Tutorial of a fixed - frequency adapter < 75 W with very low power consumptionPresented by: Petr PapicaAgenda Application and requirements flyback converter basics flyback converter parasitic Design step 1: Power stage Design step 2: Efficiency optimization Design step 3: Control mode and Design step 3: Control mode and protections Design step 4: No Load Input Power Design step 5: Magnetics Design step 6: EMI Demoboard exampleThe flyback , a popular structure The flyback converter is widely used in consumer products Ease of Design , low-cost, well-known struture Poor EMI signature, bulky transformer, practical up to 150 Wflyback 10 35 WDVD 40 180 Wnotebookflyback 3 5 WchargerEPA (External Power Supplies) (was > in previous version )(< W in )(< W in )EPS (ENERGY STAR Program Requirements for Computers) Defines ETEC for different types of products as a Typical Energy Consumption For the desktop and notebook product categories TEC will be determined by the following formula.

2 ETEC= (8760/1000) * (Poff* Toff+ Psleep* Tsleep+ Pidle* Tidle) where all Px are power values in watts, all Tx are Time values in % of year, and the TEC ETECis in units of kWh and represents annual energy consumption based on mode weightings The light load efficiency and no load consumption is more and Integrated Computers (kWh) Notebook Computers (kWh)TEC (kWh)Category A: Category B: C: D: Category A: Category B: Category C: ETEC requirement desktops and notebooks Effective from July 1, 2009 (except: game consoles from July 1, 2010)Agenda Application and requirements flyback converter basics flyback converter parasitic Design step 1: Power stage Design step 2: Efficiency optimization Design step 3: Control mode and Design step 3: Control mode and protections Design step 4: No Load Input Power Design step 5: Magnetics Design step 6: EMI Demoboard example124drv75drv891211drvVoutVoutVoutg ndgndabcVinDCSW1L1 NVinDCSW1 LVinSW1 DCAn isolated referencedbuck-boostinput referencedflybackisolated ground referenced The flyback converter is an isolated version of the buck-boost cell By rotating the switch, we obtain a ground-referenced isolated converter Keep this in mind for the small-signal analysis!

3 VinVoutLCRILILSWVLV(SW / D) = VinILVinVoutLCRILILVLV(SW / D) = VoutILVoutDOn-time and +outvalleypeakoffVIItL= SWis closed, Dis blockedSWis open, Dis closedILILC irculates in thesame direction When the switch closes, current ramps-up in L At the switch opening, the stored energy is dumped into CVinD11 flyback Similar buck-boost equations hold when scaled by the turn ratio N The switch is now ground referenced for an easier drive We have galvanic isolation between the primary and the (Np)Ls(Ns)0 ICIRVoutILs = 0 VLsDinonpVSL=inpeakvalleyonpVIItL=+CCMin peakonVItL=DCMThe turn-on = Ns / NpS The controller instructs the power switch to turn on The current increases in the inductor in relationship to Vinand Lp The output capacitor supplies the load on its ownpLinoutPIVV N V=+Reverse voltage on the diodeSimplified, no (Np)Ls(Ns)Vin+VLpICIRVoutILs = ILp / NVLsDVLp(t)VinVout/NApplying volt-second balance, +VLpN = Ns / NpILp=0S,outDS offininrVVVVVN=+=+Simplified, no leakageReflectedvoltage()()11outonswinof fswVNtNDTNDVtD TD=== ton= DTswtoff= (1-D)Tswdc transfer function in CCMVLp(t)Vout (Np)Ls(Ns)VinICIRVoutILs = 0 VLsApplying volt-second balance, DTswtoff= (1-D)Tsw2outloadinpswVRDVL F=dc transfer function in DCMNno longer plays a roleRload, Lpand FswdoVinN = Ns / Np,DS offinVV=24X1 PSW1 RON = 10m3 Cout470uIC = 10 Rload25 Vin100 Vout61X2 XFMRRATIO = , typical = 10mROFF = 1 MegV2 4 0 PULSE 0 5 0 10n 10n 3u 10u V2S A simple flyback circuit withoutparasitic elements It runs open-loop for the sake of simplicity Vout = 8 V in (lp) in amperesplot22130190250 in voltsplot33 Iin(t)ILp(t)LI IpeakVinoutVNoutinVN V+Diode in (lp) in amperesplot22130190250 in voltsplot33 Iin(t)ILp(t)

4 LI IpeakVinoutVNoutinVN V+Diode blocksInput currentIvalleyEvalleyEpeakFlyback, typical waveforms, in in in (d1) in amperesplot55 VDS(t)Vout(t)VinOutput capacitorsupplies the loadId(t)Ipeak/ in in in (d1) in amperesplot55 VDS(t)Vout(t)VinOutput capacitorsupplies the loadId(t)Ipeak/ N0100m200m300m400miin in amperesPlot110100m200m300m400mi(lp) in amperesPlot22200300400 in voltsPlot3 Iin(t)ILp(t)VDS(t)LI IpeakVoutVNoutinVN V+DCM (core reset)Diode blocks0100m200m300m400miin in amperesPlot110100m200m300m400mi(lp) in amperesPlot22200300400 in voltsPlot3 Iin(t)ILp(t)VDS(t)LI IpeakVoutVNoutinVN V+DCM (core reset)Diode blocksInput currentEvalley = 0 EpeakFlyback, typical waveforms, in in in (d1) in amperesPlot55 Vout(t)VinoutOutput capacitorsupplies the loadId(t)Ipeak/ N0100200vds in in in (d1) in amperesPlot55 Vout(t)VinoutOutput capacitorsupplies the loadId(t)Ipeak/ NVDSis backto Vinwhenall SW ,12pL valleyp valleyEL I=2,12pLpeakp peakEL I=Initially stored energyStored energy at ton()2222,111222pL accup peakp valleyppeakvalleyEL IL ILII= = Accumulated energy at TswEnergy transfer in CCM and (watts) is energy (joules) averaged over time (a switching cycle, seconds)()2212outpeakvalleypswPIIL F = 212outpeakpswPIL F =CCMDCM, Ivalley= 0 Eta, the efficiencyAgenda Application and requirements flyback converter basics flyback converter parasitic Design step 1: Power stage Design step 2: Efficiency optimization Design step 3: Control mode and Design step 3: Control mode and protections Design step 4: No Load Input Power Design step 5: Magnetics Design step 6.

5 EMI Demoboard exampleThe leakage inductance The coupling in a transformer is not perfect Some induction lines couple in the air: leakage fluxClosed pathin the airLeakage the airClosed pathin the airLeakage fluxLeakage fluxAn equivalent transformer model For a two-winding transformer, the model is simple: Two leakage inductors One magnetizing (Np)0 LleakILpILpDVin(Vout+Vf) / NLleakIpeakLleakLpIpeakVLpDThe leakage switch closes:Current flows in Lleakand LpThe switch opens:The current charges the lump = = VVout16 V0200400600800vdrain, v(9) in voltsVDS(t)VinVDS,max750 VValley = = VVout16 V0200400600800vdrain, v(9) in voltsVDS(t)VinVDS,max750 VValley switchingDrain-source in seconds-800m-400m0400m800mILp(t)ILleak(t )Ipeak= 695 in seconds-800m-400m0400m800mILp(t)ILleak(t )Ipeak= 695 mAdrvReflected Vout()outfleakDS,maxinpeaklumpVVLVVINC+= ++CharacteristicimpedanceNeed to limit the excursion!

6 8437 Cout470uIC = 10 Rload1k9 Vin100V2 Vout261X2 XFMRRATIO = {Lp}Lleak{Leak}parametersLp= VLp VLeakILpILeakID110D3 MUR160 Vclamp150 VclampDclpCclpRclpLpThe need of a 4 0 PULSE 0 5 0 10n 10n 3u 10u V2k= *k100p The clamp is made by a low impedance voltage source When the drain reaches Vin+Vclamp, the clamp diode in in amperesPlot33 ILp(t)Ileak(t)Ipeak= 236 mAI peak= 210 mA0trr t = 480 in in amperesPlot33 ILp(t)Ileak(t)Ipeak= 236 mAI peak= 210 mA0trr t = 480 nsLeakage inductorreset sequenceA reduced secondary-side in in in voltsPlot41Id(t)VDS(t)Id,peak= in in in voltsPlot41Id(t)VDS(t)Id,peak= Atrr250410570vdrain in voltsplot1 Vin2 RLe VrVrVr+ VinVin+ Vclamp250410570vdrain in voltsplot1 Vin2 RLe VrVrVr+ VinVin+ Vclamp250410570vdrain in voltsplot1 Vin2 RLe VrVrVr+ VinVin+ VclampRinging and turn-on in the valleys? in (t) in in (t)()012vpleaklumptLLCf ==+ Wait until the drain voltage is minimum and reduce turn-on losses: valley switching!

7 Agenda Application and requirements flyback converter basics flyback converter parasitic Design step 1: Power stage Design step 2: Efficiency optimization Design step 3: Control mode and Design step 3: Control mode and protections Design step 4: No Load Input Power Design step 5: Magnetics Design step 6: EMI Demoboard examplePower stage: Schematic of flyback stage Design : Bulk capacitoroutoutoutIVP = outinPP=P Output power Pout Estimation of input power PinEstimate the based on the EPA ,,bulkinavginVPI= Average input current Iin,avg Design the bulk capacitor for the maximum output power and the minimum input line stage Design : Bulk capacitor 1stcurrent approach VbulkVbulk,min = peakbulkbulkavginlinebulkVVVIfC1cos11211 , Simple current approach:avginbulkVtIC =2, 2ndpower approachbulkbulkVC =linefT1=2min222 VVtPCpeakinbulk =Use t2= to for fline= 50 HzLow volume bulk: large ripple, better PF, lower input RMS currentHigh volume bulk: low ripple, bad PF, high input RMS currentConsideration:Power stage Design : Drain voltagetleakVrVleakVclampVds(t) stage Design : Transformer ratio()max,max,, + =+Transformer ratio consideration of the VDSSof used Q1 Reflected voltage Vr at primary from secondaryrclampCVVk=The 20V means margin for clamping diode turning-on ,+=min,maxbulkrrVVVDC+=Maximum duty cycle DCmaxIn CCM operation:In DCM operation doesn t depend on N:min,min,max2loadswprimbulkoutRFLVVDC =primNNNsec=Power stage Design : Current rippleThe average shared transformer current reflected to primary winding IL,avgmax,,DCII avginavgL=Ivalley the relative ripple Ir.

8 It affects the operation in the CCM or DCMavgLrIII, = avgLrIII, = valleypeakIII = + =21,ravgLpeakIII =21,ravgLvalleyIII For universal AC input Design use the Ir in range to For European AC input use the Ir in range to stage Design : Primary inductanceIFDCVL swbulkprim =maxmin, + =322maxIIIIDCI peakpeakprimRMST ransformer primary winding inductance LprimMaximum RMS value of the current flowing through primary winding Iprim, 3maxpeakpeakprimRMSNII peakpeak=sec,NII = sec() + =312secsecsec,2sec,maxsecIIIIDCI peakpeakRMSM aximum RMS value of the current flowing through secondary winding Isec,RMSP ower stage Design : Q1 selectionThen the right device is chosen by parameters VDSmax, Ipeak, ton, toffConduction loss at Q1 should be approx. 1% of the Pout2,100 RMSprimoutDSonIPR sensing resistor RsenseselectionpeakILIM senseIVR = =2 The factor means 10% margin for Lprimand other parameters spread, to be able to deliver maximum stage Design : Secondary rectificationoutbulkVNVPIV+ =max,The next important parameters for D1 selection are I, Iand D1 selection:Cout selection:Reverse voltage across D1 Minimum CoutvalueswrippleoutoutoutFVDCIC , selection are Isec,peak, Iout and the fast and soft recoverypeakrippleoutIVESRsec,, 22sec,,outrmsrmsCoutIII =The maximum allowed ESR of CoutIt is recommended to use more parallel Cout for lowering the output voltage partPower stage Design : Clamping networkTVS losses in the suppressor:RCD clamp 1stiteration.

9 RclampclampswpeakleakswclampclampVVVFILF EP = =221better EMI responsebetter at no load =22clampclampclampRVP2=swclamprippleclam pclampFRVVC >These values need to be optimized for the no load consumption and losses in slow clamping diode D2 TVS vs RCD clamp voltage ringing with TVS as clampDrain voltage ringing with RCD as clampCh1 Drain,Ch3 Clamp nodeDifferent Rdampused in clampAgenda Application and requirements flyback converter basics flyback converter parasitic Design step 1: Power stage Design step 2: Efficiency optimization Design step 3: Control mode and Design step 3: Control mode and protections Design step 4: No Load Input Power Design step 5: Magnetics Design step 6: EMI Demoboard exampleApplication losses loss [W]Losses distribution measured without EMI filters and surge protecting lineInput powerOutput powerTotal loss powerEfficiency110 V / 60 rectifierTransformerPrimary switchSecondary rectifierOptimization of efficiency There was not found excessive contributor of losses in the power stage of the flyback converter Losses in all components should be decreased Optimization approach:1) decreasing the losses in power stage by selection of primary switch Q1 and secondary rectifier switch Q1 and secondary rectifier D12) decreasing the losses in power stage by decreasing losses in transformer3) try to improve the bridge rectifier (not much space)4) decreasing the conductive losses in EMI filters5) Do we need surge protecting NTC in case of low value bulk capacitor ?

10 Influence of EMI filters Input EMI filter contributes to the conductive losses mainly at full load and low line condition The high inductance 22mH or more is needed to reject the low frequency emissions ( below 1 MHz ) There is needed to use two chamber CM choke or 2 CM mode chokes to reject the high frequency emissions above 10 MHz Output EMI filter (CM choke) reject the high frequency emissions from the DC cord, only low inductance is needed low Rdc low DC cord, only low inductance is needed low Rdc low conduction losses The most important are losses in the high inductance input common choke from the efficiency optimization point of viewNote from experiments:There was found an influence of HF ripple at input current to the precision of measurement of input power using wattmeter YOKOGAWA WT210. There were measured lower input power with the connected 100uH common choke in comparison without any EMC filter.