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Stratix II GX & Stratix GX Brochure - intel.cn

Stratix II GX & Stratix GXTransceivers With Integrity October 20052 Altera CorporationAltera Corporation3 High-Performance FPGAs With Embedded TransceiversIf you need transceivers with superior signal integrity and the flexibility of an FPGA, you can rely on the Altera Stratix II GX and Stratix GX families. Building on the Stratix GX transceivers excellent jitter performance, the award-winning Stratix II architecture, and the industry s easiest-to-use software, Altera created the Stratix II GX family and its complete system solutions to give you the tools you need for high-reliability systems for your trans-ceiver applications. Stratix II GX FPGAs are ideal for applications requiring high-bandwidth serial communica-tion, such as wireline, wireless, broadcast, military, test and measurement, and medical for Your Success To meet your evolving transceiver requirements, Altera built Stratix II GX transceivers for best-in-class jitter performance over a wide range of data rates from 622 Mbps to Gbps to comply with leading

high jitter tolerance. Stratix II GX FPGAs comply with many protocol standards, providing generous margin as well as optimized transmit pre-emphasis, receive equalization, and

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Transcription of Stratix II GX & Stratix GX Brochure - intel.cn

1 Stratix II GX & Stratix GXTransceivers With Integrity October 20052 Altera CorporationAltera Corporation3 High-Performance FPGAs With Embedded TransceiversIf you need transceivers with superior signal integrity and the flexibility of an FPGA, you can rely on the Altera Stratix II GX and Stratix GX families. Building on the Stratix GX transceivers excellent jitter performance, the award-winning Stratix II architecture, and the industry s easiest-to-use software, Altera created the Stratix II GX family and its complete system solutions to give you the tools you need for high-reliability systems for your trans-ceiver applications. Stratix II GX FPGAs are ideal for applications requiring high-bandwidth serial communica-tion, such as wireline, wireless, broadcast, military, test and measurement, and medical for Your Success To meet your evolving transceiver requirements, Altera built Stratix II GX transceivers for best-in-class jitter performance over a wide range of data rates from 622 Mbps to Gbps to comply with leading serial protocol standards.

2 Stratix II GX devices offer up to 130,000 equivalent logic elements (LEs) and significantly enhanced pre-emphasis and equalization functionality. The high-performance 90-nm FPGA architecture, coupled with robust transceivers, helps you achieve your most challenging system performance and high-speed interconnect goals. To support your entire transceiver system, Altera offers design software, intellectual property (IP) cores, develop-ment kits and evaluation boards, reference designs, HSPICE models, and technical collateral. In addition, you can use board design tools from Cadence (Allegro SI) and Mentor Graphics (ICX and HyperLynx) to verify your design s signal integrity or simulate your entire system.

3 Whether you are implementing standard or proprietary protocols or using transceivers for backplane or chip-to-chip applications, the Stratix II GX and Stratix GX families provide the most complete transceiver solutions for your designs. Ideal Transceiver Features Stratix II GX transceivers support a wide variety of proto-cols in silicon. Each transceiver block includes dedicated circuitry to support the PCI Express, high-definition serial Stratix II GX & Stratix GX Transceiver FeaturesParameterStratix II GXStratix GXData Rate Range622 Mbps Gbps500 Mbps GbpsWith Oversampling270 Mbps270 MbpsPower Consumption 125 mW per Channel at Gbps 225 mW per Channel at Gbps 150 mW per Channel at GbpsMaximum Pre-Emphasis Level 500% 3 Taps 140% 2 TapsMaximumEqualization Level 17 dB 4 Stages 9 dB 1 StageOutput Differential Voltage Range400 mV 1,400 mV400 mV 1,600 mVChannel Groups Quad (4 Receive Phase-Locked Loops (PLLs))

4 , 2 Transmit PLLs Independent Channels 4 Different Data Rates Quad (4 Receive PLLs, 1 Transmit PLL) Independent Channels 1 Data RateDynamic ReconfigurationYesYesMaximum Number of LEs130,00040,000 2 Altera CorporationAltera Corporation3digital interface (HD-SDI), standard-definition (SD)

5 -SDI, XAUI, Serial RapidIO (SRIO), SerialLite II, and Gigabit Ethernet standards, among others. Both Stratix II GX and Stratix GX transceivers include built-in word detection and alignment circuitry and built-in 8b/10b encoder/decoders, which you can bypass when not required in your system. These devices are suitable for key standard and proprietary serial applications, and can be used in backplane or chip-to-chip Protocol SolutionsIn conjunction with Stratix II GX FPGAs, Altera offers complete protocol solutions to simplify your design process and reduce your time-to-market. Serial data rates from 622 Mbps to Gbps support popular standards with extra margin. The built-in Stratix II GX physical coding sublayer (PCS) blocks, which are part of the transceiver block, make designing for these standards easier than ever because they save valuable logic resources and simplify protocol support.

6 In addition to meeting your hardware requirements, Altera offers protocol-specific design software, development boards, IP cores, reference designs, and technical collateral (including board layout guidelines, characterization reports, and user guides). Stratix II GX Device Family The 90-nm Stratix II GX family is Altera s newest generation of FPGAs with embedded transceivers. The family provides a complete solution for the growing number of applications and protocols requiring high-speed serial interconnect. Stratix II GX devices employ the same archi-tecture used in Stratix II FPGAs and integrate up to 20 serializer/deserializer (SERDES)-based II GX devices offer optimal signal integrity and ample design headroom.

7 Performance at Gbps shows excellent signal integrity, including low jitter generation and Built-In Protocol Standards SupportStandard (Data Rate)FeatureStratix II GXStratix GXPCI Express( Gbps)PIPE-Compliant PCS Block (Version ) 1 CEI 6G2( Gbps)8b/10b Encoder/Decoder Gigabit Ethernet( Gbps)Gigabit Ethernet State Machine XAUI( Gbps)XAUI State Machine SRIO( , & Gbps)8b/10b Encoder/Decoder SONET OC-12(622 Mbps)A1A2 Pattern Detector & Aligner SONET OC-48( Gbps)A1A2 or A1A1A2A2 Pattern Detector & Aligner SD-SDI(270 Mbps)Oversampling HD-SDI( Gbps or Gbps)Pattern Detector SerialLite II(622 Mbps Gbps)8b/10b Encoder/Decoder Notes:1 In Stratix GX devices, receive detect, out-of-board signaling (OOBS), and electrical idle are not supported, and PIPE must be implemented in logic.

8 2 CEI-6G: Common Electrical Implementation 6 GbitExamples of Altera s High-Speed Transceiver FeaturesStandardComplete Protocol SolutionsGigabit Ethernet Gigabit Ethernet MAC IP Development kit with HSSDC2 high-speedconnector, schematics & layout Characterization reportPCI Express PCI Express MegaCore IP functions - Compliant, including PCI-SIG Integrators Listing - Supports x1, x4 & x8 - Endpoint Development kit with x8 edge connector & slot, schematics & layout Characterization report Reference designHD-SDISD-SDI SDI IP - Full duplex interface that supports rate detec- tion, cyclic redundancy check (CRC) & video pattern generator Development kit with driver, cable equalizer, schematics & layout Characterization report high jitter tolerance.

9 Stratix II GX FPGAs comply with many protocol standards, providing generous margin as well as optimized transmit pre-emphasis, receive equalization, and signal integrity for even the most challenging backplanes. In addition, Stratix II GX devices feature low power consumption; for example, only 125 mW per channel at Gbps and 225 mW per channel at Gbps. Stratix GX Device FamilyStratix GX devices include up to 20 full-duplex transceiver channels, each capable of operating at up to Gbps per channel while consuming low power. Built on the first-generation Stratix architecture, Stratix GX devices offer the same FPGA features, including TriMatrix memory, digital signal processing (DSP) blocks, and advanced clock management circuitry for intensive data path processing functions.

10 Stratix GX FPGAs integrate an optimized transceiver that includes customer-defined features such as 40-inch backplane drive strength capability, transmit pre-emphasis, receive equalization, channel alignment, and embedded 8b/10b encoding/decoding. In addition, Stratix GX devices contain source-synchronous differential I/O (operating at up to 1 Gbps) with circuitry that performs dynamic phase alignment (DPA). Contact Altera TodayAltera s Stratix II GX and Stratix GX families provide the industry s leading transceiver solutions. For more information, visit Altera s web site at or 2005 Altera Corporation. All rights reserved. Altera, the stylized Altera logo, specific device designations, and all other words and logos that are identified as trademarks and/or service marks are, unless noted otherwise, the trademarks and service marks of Altera Corporation in the and other countries.


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