SWITCHING THEORY AND LOGIC DESIGN COURSEFILE

1 SWITCHING THEORY AND LOGIC DESIGN COURSEFILE COURSEFILE contents: 1. Cover Page 2. Syllabus copy 3. Vision of the department 4. Mission of the department 5. PEOs and POs 6. Course objectives and outcomes 7. Brief note on the importance of the course and how it fits in to the curriculum 8. Prerequisites 9. Instructional Learning Outcomes 10. Course mapping with PEOs and POs 11. Class Time Table 12. Individual Time Table 13. Lecture schedule with methodology being used/adopted 14. Detailed notes 15. Additional/missing topics 16.

2 University previous Question papers 17. Question Bank 18. Assignment topics 19. Unit wise questions 20. Tutorial problems 21. Known gaps 22. Discussion topics 23. References, Journals, websites and E-links 24. Quality measurement Sheets a. course and survey b. Teaching evaluation 25. Student List 26. GroupWise Student List for discussion topics GEETHANJALI COLLEGE OF ENGINEERING AND TECHNOLOGY DEPARTMENT OF Electrical and Electronics Engineering (Name of the Subject / Lab Course) : SWITCHING THEORY and LOGIC DESIGN (JNTU CODE A40407) Programme : UG Branch: Electrical and Electronics Engineering Version No : 01 Year.

3 II year Generated on : 05/11/15 Semester: II-Sem No. of pages : Classification status (Unrestricted / Restricted ) Distribution List : Prepared by : 1) Name : , 1) Name : 2) Sign : 2) Sign : 3) DESIGN : Assoc. Prof 3) DESIGN : 4) Date : 05/11/2015 4) Date : Verified by : 1) Name : 2) Sign : 3) DESIGN : 4) Date : * For Only.

4 1) Name : 2) Sign : 3) DESIGN : 4) Date : Approved by : (HOD ) 1) Name : 2) Sign : 3) Date : 2. Syllabus copy JAWAHARLAL NEHRU TECHNOLOGIVAL UNIVERSITY HYDERABAD II Year EEE II Sem L T/ P/ D C 4 -/ - / - 4 SWITCHING THEORY AND LOGIC DESIGN UNIT I NUMBER SYSTEMS AND BOOLEAN ALGEBRA AND SWITCHING FUNCTIONS: Number systems: Base Conversion Methods, Complement of Numbers, Codes - Binary codes, Binary Coded Decimal code and its properties, Unit distance codes, Alpha Numeric codes, Error detecting and correcting codes.

5 Boolean Algebra: Basic theorems and properties SWITCHING Functions: Canonical and Standard forms, Algebraic simplification of digital LOGIC gates, Properties of XOR gates , Universal gates, Multilevel NAND/NOR realizations. UNIT II MINIMIZATION AND DEGIN OF COMBINATIONAL CIRCUITS: Introduction, The Minimization with theorem, The Karnaugh Map Method, Five and Six variable Maps, Prime and Essential Implications, Don t care Map entries, Using the maps for Simplifying, Tabular method, Partially specified Expressions, Multi-Output Minimization, Minimization and combinational DESIGN , Arithmetic Circuits, Comparator, Multiplexers, Code Converters, Wired LOGIC , Tristate Bus system, Practical Aspects related to Combinational LOGIC DESIGN , Hazards and Hazard Free Relations.

6 UNIT III SEQUENCTIAL MACHINES FUNDAMENTALS: Introduction, Basic Architectural Distinctions between Combinational and Sequential circuits, the Binary Cell, Fundamentals of Sequential Machine Operation, The Flip-Flop, The D- Latch Flip-Flop, the Clocked T Flip-Flop, the clocked J-K Flip-Flop, DESIGN of a clocked Flip-flop, conversion from one Type of Flip-Flop to another, Timing and Triggering considerations, Clock skew. UNIT IV SEQUENTIAL CIRCUITS DESIGN AND ANALYSIS: Introduction, State diagram, Analysis of Synchronous Sequential Circuits, Approaches to the DESIGN of Synchronous sequential Finite State Machines, DESIGN Aspects, State Reduction, DESIGN Steps, Realization using Flip-Flops.

7 Counters: DESIGN Of Single Mode Counters; Ripple Counter, Ring Counter, Shift Register, Shift Register Sequences, Ring Counter using Shift Register. UNIT V SEQUENTIAL CIRCUITS : Finite state machine-capabilities and limitations, Mealy and Moore models-minimization of completely specified and incompletely specified sequential machines, Partition techniques and Merger chart methods-concept of minimal cover table. ALGOROTHIMIC STATE MACHINES : Salient features of the ASM chart-Simple examples-System DESIGN using data path and control subsystems-control implementations-examples of Weighing machine and Binary multiplier.

8 TEXT BOOKS : 1. SWITCHING & Finite Automata THEORY Zvi Kohavi and Neeraj K Jha, ,3rd Edition, Cambridge. 2. Digital DESIGN Morris Mano, PHI, 3rd Edition. REFERENCE BOOKS: 1. Introduction to SWITCHING THEORY and LOGIC DESIGN Fredriac J Hill, Gerald R Peterson, 3rd Edition, John Willey and Sons Inc, 2. Digital Fundamentals A Systems approach Thomas L Floyd, Pearson, 2013. 3. Digital LOGIC DESIGN Ye Brian and HoldsWorth, Elsevier 4. Fundamentals of LOGIC DESIGN Charles H. Roth, Thomson Publications, 5th Edition, 2004 5.

9 Digital LOGIC Applications and DESIGN John M. Yarbrough, Thomson Publications, 2006 6. Digital LOGIC and state machine DESIGN Comer, 3rd, Oxford 2013. 3. Vision of EEE To provide excellent Electrical and electronics education by building strong teaching and research environment 4. Mission of EEE To offer high quality graduate program in Electrical and Electronics education and to prepare students for professional career or higher studies. The department promotes excellence in teaching, research, collaborative activities and positive contributions to society PROGRAM EDUCATIONAL OBJECTIVES PEO 1.

10 Graduates will excel in professional career and/or higher education by acquiring knowledge in Mathematics, Science, Engineering principles and Computational skills. PEO 2. Graduates will analyze real life problems, DESIGN Electrical systems appropriate to the requirement that are technically sound, economically feasible and socially acceptable. PEO will exhibit professionalism, ethical attitude, communication skills, team work in their profession, adapt to current trends by engaging in lifelong learning and participate in Research & Development.