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TCS3472 COLOR LIGHT-TO-DIGITAL CONVERTER with IR FILTER

TCS3472 COLOR LIGHT-TO-DIGITAL CONVERTER with IR FILTERTAOS135 AUGUST 20121 The LUMENOLOGYr CompanyrrCopyright E 2012, TAOS , Green, Blue (RGB), and Clear LightSensing with IR Blocking FILTER Programmable Analog Gain andIntegration Time 3,800,000:1 Dynamic Range Very High Sensitivity Ideally Suited forOperation Behind Dark GlassDMaskable Interrupt Programmable Upper and LowerThresholds with Persistence FilterDPower Management Low Power Sleep State 65-mA Wait State with Programmable WaitState Time from ms to > 7 SecondsDI2C Fast Mode Compatible Interface Data Rates up to 400 kbit/s Input Voltage Levels Compatible with VDDor V BusDRegister Set and Pin Compatible with theTCS3x71 SeriesDSmall 2 mm mm Dual Flat No-Lead(FN) PackageApplicationsDRGB LED Backlight ControlDLight COLOR Temperature MeasurementDAmbient Light Sensing for DisplayBacklight ControlDFluid and Gas AnalysisDProduct COLOR Verification and SortingEnd Products and Market SegmentsDTVs, Mobile Handsets, Tablets, Computers,and MonitorsDConsumer and Commercial PrintingDMedical and Health FitnessDSolid State Lighting (SSL)

Solid State Lighting (SSL) and Digital Signage Industrial Automation Description The TCS3472 device provides a digital return of red, green, blue (RGB), and clear light sensing values. An IR blocking filter, integrated on-chip and localized to the color sensing photodiodes, minimizes the …

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Transcription of TCS3472 COLOR LIGHT-TO-DIGITAL CONVERTER with IR FILTER

1 TCS3472 COLOR LIGHT-TO-DIGITAL CONVERTER with IR FILTERTAOS135 AUGUST 20121 The LUMENOLOGYr CompanyrrCopyright E 2012, TAOS , Green, Blue (RGB), and Clear LightSensing with IR Blocking FILTER Programmable Analog Gain andIntegration Time 3,800,000:1 Dynamic Range Very High Sensitivity Ideally Suited forOperation Behind Dark GlassDMaskable Interrupt Programmable Upper and LowerThresholds with Persistence FilterDPower Management Low Power Sleep State 65-mA Wait State with Programmable WaitState Time from ms to > 7 SecondsDI2C Fast Mode Compatible Interface Data Rates up to 400 kbit/s Input Voltage Levels Compatible with VDDor V BusDRegister Set and Pin Compatible with theTCS3x71 SeriesDSmall 2 mm mm Dual Flat No-Lead(FN) PackageApplicationsDRGB LED Backlight ControlDLight COLOR Temperature MeasurementDAmbient Light Sensing for DisplayBacklight ControlDFluid and Gas AnalysisDProduct COLOR Verification and SortingEnd Products and Market SegmentsDTVs, Mobile Handsets, Tablets, Computers,and MonitorsDConsumer and Commercial PrintingDMedical and Health FitnessDSolid State Lighting (SSL)

2 And DigitalSignageDIndustrial Automation DescriptionThe TCS3472 device provides a digital return of red, green, blue (RGB), and clear light sensing values. An IRblocking FILTER , integrated on-chip and localized to the COLOR sensing photodiodes, minimizes the IR spectralcomponent of the incoming light and allows COLOR measurements to be made accurately. The high sensitivity,wide dynamic range, and IR blocking FILTER make the TCS3472 an ideal COLOR sensor solution for use undervarying lighting conditions and through attenuating TCS3472 COLOR sensor has a wide range of applications including RGB LED backlight control, solid-statelighting, health/fitness products, industrial process controls and medical diagnostic equipment. In addition, theIR blocking FILTER enables the TCS3472 to perform ambient light sensing (ALS). Ambient light sensing is widelyused in display-based products such as cell phones, notebooks, and TVs to sense the lighting environment andenable automatic display brightness for optimal viewing and power savings.

3 The TCS3472 , itself, can enter alower-power wait state between light sensing measurements to further reduce the average power Advanced Optoelectronic Solutions Klein Road S Suite 300 S Plano, TX 75074 S (972) 673-0759 Package Drawing Not to ScalePACKAGE FNDUAL FLAT NO-LEAD(TOP VIEW)6 SDA5 INT4 NCVDD 1 SCL 2 GND 3 TCS3472 COLOR LIGHT-TO-DIGITAL CONVERTER with IR FILTERTAOS135 AUGUST 20122rrCopyright E 2012, TAOS LUMENOLOGYr Block DiagramSDAVDDINTSCLWait ControlClear ADCU pper LimitLower LimitInterruptI2C InterfaceGNDRed ADCG reen ADCBlue ADCC lear DataRed DataGreen DataBlue DataRGBC ControlBlueGreenRedClearIR-BlockingFilte rDetailed DescriptionThe TCS3472 LIGHT-TO-DIGITAL CONVERTER contains a 3 4 photodiode array, four analog-to- digital converters(ADC) that integrate the photodiode current, data registers, a state machine, and an I2C interface. The 3 4photodiode array is composed of red-filtered, green-filtered, blue-filtered, and clear (unfiltered) addition, the photodiodes are coated with an IR-blocking FILTER .

4 The four integrating ADCs simultaneouslyconvert the amplified photodiode currents to a 16-bit digital value. Upon completion of a conversion cycle, theresults are transferred to the data registers, which are double-buffered to ensure the integrity of the data. Allof the internal timing, as well as the low-power wait state, is controlled by the state of the TCS3472 data is accomplished over a fast, up to 400 kHz, two-wire I2C serial bus. Theindustry standard I2C bus facilitates easy, direct connection to microcontrollers and embedded addition to the I2C bus, the TCS3472 provides a separate interrupt signal output. When interrupts areenabled, and user-defined thresholds are exceeded, the active-low interrupt is asserted and remains asserteduntil it is cleared by the controller. This interrupt feature simplifies and improves the efficiency of the systemsoftware by eliminating the need to poll the TCS3472 .

5 The user can define the upper and lower interruptthresholds and apply an interrupt persistence FILTER . The interrupt persistence FILTER allows the user to define thenumber of consecutive out-of-threshold events necessary before generating an interrupt. The interrupt outputis open-drain, so it can be wire-ORed with other LIGHT-TO-DIGITAL CONVERTER with IR FILTERTAOS135 AUGUST 20123 The LUMENOLOGYr CompanyrrCopyright E 2012, TAOS supply ground. All voltages are referenced to open drain (active low).NC4 ONo connect do not serial clock input terminal clock signal for I2C serial serial data I/O terminal serial data I/O for I2C .VDD1 Supply OptionsDEVICEADDRESSPACKAGE LEADSINTERFACE DESCRIPTIONORDERING NUMBERTCS34721 0x39FN 6I2C Vbus = VDD InterfaceTCS34721 FNTCS34723 0x39FN 6I2C Vbus = V InterfaceTCS34723 FNTCS347250x29FN 6I2C Vbus = VDD InterfaceTCS34725 FNTCS347270x29FN 6I2C Vbus = V InterfaceTCS34727FN Contact TAOS for Maximum Ratings over operating free-air temperature range (unless otherwise noted) Supply voltage, VDD (Note 1) V.

6 Input terminal voltage V to V.. Output terminal voltage V to V.. Output terminal current 1 mA to 20 mA.. Storage temperature range, Tstg 40 C to 85 C.. ESD tolerance, human body model 2000 V.. Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, andfunctional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is notimplied. Exposure to absolute-maximum-rated conditions for extended periods may affect device 1: All voltages are with respect to Operating ConditionsMINNOMMAXUNITS upply voltage, VDD (TCS34721 & TCS34725) (I2C Vbus = VDD) voltage, VDD (TCS34723 & TCS34727) (I2C Vbus = V) free-air temperature, TA 3070 CTCS3472 COLOR LIGHT-TO-DIGITAL CONVERTER with IR FILTERTAOS135 AUGUST 20124rrCopyright E 2012, TAOS LUMENOLOGYr Characteristics, VDD = 3 V, TA = 25 C (unless otherwise noted)PARAMETERTEST CONDITIONSMINTYPMAXUNITA ctive235330 IDDS upply currentWait state65 AIDDS upply currentSleep state no I2C AVINT SDA output low voltage3 mA sink , SDA output low voltage6 mA sink current, SDA, SCL, INT pins 55 AILEAKL eakage current, LDR pin 55 AVSCL SDA input high voltageTCS34721 & VDDVVIHSCL, SDA input high voltageTCS34723 & SDA input low voltageTCS34721 & VDDVVILSCL, SDA input low voltageTCS34723 & Characteristics, VDD = 3 V, TA = 25 C, AGAIN = 16 , ATIME = 0xF6 (unless otherwise noted)

7 (Note 1)PARAMETERTESTRed ChannelGreen ChannelBlue ChannelClear ChannelUNITPARAMETERTESTCONDITIONSMINTYP MAXMINTYPMAXMINTYPMAXMINTYPMAXUNIT D = 465 nmNote 20%15%10%42%65%88% D = 525 nmNote 34%25%60%85%10%45% W/cm2responsivity D = 615 nmNote 480%110%0%14%5%24% : 1. The percentage shown represents the ratio of the respective red, green, or blue channel value to the clear channel The 465 nm input irradiance is supplied by an InGaN light-emitting diode with the following characteristics: dominant wavelength D = 465 nm, spectral halfwidth = 22 The 525 nm input irradiance is supplied by an InGaN light-emitting diode with the following characteristics: dominant wavelength D = 525 nm, spectral halfwidth = 35 The 615 nm input irradiance is supplied by a AlInGaP light-emitting diode with the following characteristics: dominant wavelength D = 615 nm, spectral halfwidth = 15 Characteristics, VDD = 3 V, TA = 25 C, AGAIN = 16 , AEN = 1 (unless otherwise noted)PARAMETERTEST CONDITIONSMINTYPMAXUNITDark ADC count valueEe = 0, AGAIN = 60 , ATIME = 0xD6 (100 ms)015countsADC integration time step sizeATIME = number of integration steps(Note 5)1256stepsADC counts per step (Note 5)01024countsADC count value (Note 5)ATIME = 0xC0 ( ms)065535countsGililti t 1 i4 scaling, relative to 1 gain16 151616 8 Gain scaling, relative to 1 gainsetting16 setting60 586063 NOTE 5: Parameter ensured by design and is not LIGHT-TO-DIGITAL CONVERTER with IR FILTERTAOS135 AUGUST 20125 The LUMENOLOGYr CompanyrrCopyright E 2012, TAOS Characteristics, VDD = 3 V, TA = 25 C, WEN = 1 (unless otherwise noted)PARAMETERTEST CONDITIONSCHANNELMINTYPMAXUNITWait step sizeWTIME = number of integration steps (Note 1)1256stepsNOTE 1.

8 Parameter ensured by design and is not Electrical Characteristics, VDD = 3 V, TA = 25 C (unless otherwise noted)PARAMETER TEST CONDITIONSMINTYPMAXUNITf(SCL)Clock frequency (I2C only)0400kHzt(BUF)Bus free time between start and stop st(HDSTA)Hold time after (repeated) start condition. Afterthis period, the first clock is st(SUSTA)Repeated start condition setup st(SUSTO)Stop condition setup st(HDDAT)Data hold time0 st(SUDAT)Data setup time100nst(LOW)SCL clock low st(HIGH)SCL clock high stFClock/data fall time300nstRClock/data rise time300nsCiInput pin capacitance10pF Specified by design and characterization; not production MEASUREMENT INFORMATIONS tartConditionStopConditionPSDAt(SUSTO)t( SUDAT)t(HDDAT)t(BUF)VIHVILSCLt(SUSTA)t(H IGH)t(F)t(R)t(HDSTA)t(LOW)VIHVILPSSF igure 1. Timing DiagramsTCS3472 COLOR LIGHT-TO-DIGITAL CONVERTER with IR FILTERTAOS135 AUGUST 20126rrCopyright E 2012, TAOS LUMENOLOGYr CHARACTERISTICSF igure 2300500700900 Relative Responsivity1100 Wavelength nmPHOTODIODE SPECTRAL = 25 CNormalized toClear@ 755 nmRedGreenClearBlueFigure 3 NORMALIZED DISPLACEMENTQ Angular Displacement Normalized 90 60 300306090 Optical Axis-Q+Q0 C25 CFigure 4 NORMALIZED and TEMPERATUREVDD VIDD Normalized @ 3 V, 25 C94%96%98%100%102%104%106%108%110%92% C50 CFigure 5 RESPONSIVITY TEMPERATURECOEFFICIENT4006008001000 Temperature Coefficient ppm/ C100100010,000500700900 Wavelength nmTCS3472 COLOR LIGHT-TO-DIGITAL CONVERTER with IR FILTERTAOS135 AUGUST 20127 The LUMENOLOGYr CompanyrrCopyright E 2012, TAOS OF OPERATIONS ystem StatesAn internal state machine provides system control of the RGBC and power management features of the power up.

9 An internal power-on-reset initializes the device and puts it in a low-power Sleep a start condition is detected on the I2C bus, the device transitions to the Idle state where it checks theEnable Register (0x00) PON bit. If PON is disabled, the device will return to the Sleep state to save , the device will remain in the Idle state until the RGBC function is enabled (AEN). Once enabled, thedevice will execute the Wait and RGBC states in sequence as indicated in Figure 5. Upon completion and returnto Idle, the device will automatically begin a new Wait-RGBC cycle as long as PON and AEN remain enabled.!WEN& AENS leepIdleRGBCWaitI2 CStart!PONWEN &AENF igure 6. Simplified State DiagramTCS3472 COLOR LIGHT-TO-DIGITAL CONVERTER with IR FILTERTAOS135 AUGUST 20128rrCopyright E 2012, TAOS LUMENOLOGYr OperationThe RGBC engine contains RGBC gain control (AGAIN) and four integrating analog-to- digital converters (ADC)for the RGBC photodiodes.

10 The RGBC integration time (ATIME) impacts both the resolution and the sensitivityof the RGBC reading. Integration of all four channels occurs simultaneously and upon completion of theconversion cycle, the results are transferred to the COLOR data registers. This data is also referred to as transfers are double-buffered to ensure that invalid data is not read during the transfer. After thetransfer, the device automatically moves to the next state in accordance with the configured state (r 0x0F, b1:0)1 , 4 , 16 , 60 GainCDATAH(r 0x15), CDATA(r 0x14)Clear ADCRed ADCG reen ADCBlue ADCC lear DataRed DataGreen DataBlue DataRGBC ControlBlueGreenRedClearRDATAH(r 0x17), RDATA(r 0x16)GDATAH(r 0x19), GDATA(r 0x18)BDATAH(r 0x1B), BDATA(r 0x1A)ATIME(r0x0 1) ms to 614 msFigure 7. RGBC OperationNOTE: In this document, the nomenclature uses the bit field name in italics followed by the register addressand bit number to allow the user to easily identify the register and bit that controls the function.


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