TMS320x2833x Analog-to-Digital Converter (ADC

1 TMS320x2833xAnalog-to-DigitalConverter(A DC)ModuleReferenceGuideLiteratureNumber: SPRU812 ASeptember2007 RevisedOctober20072 SPRU812A September2007 (ADC).. (SequencerStart/StopOperationWithMultipl eTime-SequencedTriggers).. (ADCMAXCONV).. (ADCASEQSR).. (ADCST).. (ADCREFSEL).. (ADCOFFTRIM).. (ADCRESULTn)..45 SPRU812A September2007 (SMODE=0)..131-3 SimultaneousSamplingMode(SMODE=1).. (S/H) (ADCTRL1)(AddressOffset00h)..342-2 ADCC ontrolRegister2(ADCTRL2)(AddressOffset01 h)..352-3 ADCC ontrolRegister3(ADCTRL3)(AddressOffset18 h)..372-4 MaximumConversionChannelsRegister(ADCMAX CONV)(OffsetAddress02h)..382-5 AutosequenceStatusRegister(ADCASEQSR)(Ad dressOffset07h)..402-6 ADCS tatusandFlagRegister(ADCST)(AddressOffse t19h)..412-7 ADCR eferenceSelectRegister(ADCREFSEL)(Addres sOffset1Ch)..432-8 ADCO ffsetTrimRegister(ADCOFFTRIM)(AddressOff set1Dh)..432-9 ADCI nputChannelSelectSequencingControlRegist ers(ADCCHSELSEQ1)(AddressOffset03h).

2 442-10 ADCI nputChannelSelectSequencingControlRegist ers(ADCCHSELSEQ2)(AddressOffset04h)..442 -11 ADCI nputChannelSelectSequencingControlRegist ers(ADCCHSELSEQ3)(AddressOffset05h)..442 -12 ADCI nputChannelSelectSequencingControlRegist ers(ADCCHSELSEQ4)(AddressOffset06h)..442 -13 ADCC onversionResultBufferRegisters(ADCRESULT n)-(Addresses0x7108-0x7117)..452-14 ADCC onversionResultBufferRegisters(ADCRESULT n)-(Addresses0x0B00-0x0B0F)..454 ListofFiguresSPRU812A September2007 (MAX_CONV1 Setto6)..201-4 ValuesforADCCHSELSEQn(MAX_CONV1setto2).. (ADCTRL1) (ADCTRL2) (ADCTRL3) (ADCMAXCONV) (ADCASEQSR) (ADCST) (ADCREFSEL) (ADCOFFTRIM) September2007 RevisedOctober2007 ListofTables5 SubmitDocumentationFeedbackListofTables6 SPRU812A September2007 RevisedOctober2007 SubmitDocumentationFeedbackPrefaceSPRU81 2A September2007 RevisedOctober2007 ReadThisFirstNotationalConventionsThisdo cumentusesthefollowingconventions.

3 ,thefollowingnumberis40hexadecimal(decim al64):40hor0x40. Registersinthisdocumentareshowninfigures anddescribedintables. ,itsbeginningandendingbitnumbersabove, , SPRS439 TMS320F28335,F28334,F28332 DigitalSignalControllers(DSCs)DataManual containsthepinout,signaldescriptions, 'sGuides SPRU430 TMS320C28xDSPCPUandInstructionSetReferen ceGuidedescribesthecentralprocessingunit (CPU)andtheassemblylanguageinstructionso ftheTMS320C28xfixed-pointdigitalsignalpr ocessors(DSPs). SPRU566 TMS320x28xx,28xxxPeripheralReferenceGuid edescribestheperipheralreferenceguidesof the28xdigitalsignalprocessors(DSPs).SPRU FB0 TMS320x2833xSystemControlandInterruptsRe ferenceGuidedescribesthevariousinterrupt sandsystemcontrolfeaturesofthe2833xdigit alsignalcontrollers(DSCs).SPRU812 TMS320x2833xAnalog-to-DigitalConverter(A DC)ReferenceGuidedescribeshowtoconfigure andusetheon-chipADCmodule, TMS320x2833xExternalInterface(XINTF)User 'sGuidedescribestheXINTF,whichisanonmult iplexedasynchronousbus, TMS320x2833xBootROMUser'sGuidedescribest hepurposeandfeaturesofthebootloader(fact ory-programmedboot-loadingsoftware) TMS320x2833xMultichannelBufferedSerialPo rt(McBSP)User' TMS320x2833xDirectMemoryAccess(DMA) September2007 TMS320x28xx,28xxxEnhancedPulseWidthModul ator(ePWM)ModuleReferenceGuidedescribest hemainareasoftheenhancedpulsewidthmodula torthatincludedigitalmotorcontrol,switch modepowersupplycontrol,UPS(uninterruptib lepowersupplies), TMS320x28xx,28xxxHigh-ResolutionPulseWid thModulator(HRPWM)describestheoperationo fthehigh-resolutionextensiontothepulsewi dthmodulator(HRPWM).

4 SPRU807 TMS320x28xx,28xxxEnhancedCapture(eCAP) TMS320x28xx,28xxxEnhancedQuadratureEncod erPulse(eQEP)ReferenceGuidedescribesthee QEPmodule,whichisusedforinterfacingwitha linearorrotaryincrementalencodertogetpos ition,direction, TMS320x28xx,28xxxEnhancedControllerAreaN etwork(eCAN) TMS320x28xx,28xxxSerialCommunicationInte rface(SCI)ReferenceGuidedescribestheSCI, whichisatwo-wireasynchronousserialport, (NRZ) TMS320x28xx,28xxxSerialPeripheralInterfa ce(SPI)ReferenceGuidedescribestheSPI-ahi gh-speedsynchronousserialinput/output(I/ O)port-thatallowsaserialbitstreamofprogr ammedlength(onetosixteenbits) TMS320x28xx,28xxxInter-IntegratedCircuit (I2C)ReferenceGuidedescribesthefeaturesa ndoperationoftheinter-integratedcircuit( I2C)modulethatisavailableontheTMS320x280 xdigitalsignalprocessor(DSP).ToolsGuides SPRU513 TMS320C28xAssemblyLanguageToolsUser'sGui dedescribestheassemblylanguagetools(asse mblerandothertoolsusedtodevelopassemblyl anguagecode),assemblerdirectives,macros, commonobjectfileformat, TMS320C28xOptimizingCCompilerUser'sGuide describestheTMS320C28x C/C++ ++ TheTMS320C28xInstructionSetSimulatorTech nicalOverviewdescribesthesimulator,avail ablewithintheCodeComposerStudioforTMS320 C2000 IDE,thatsimulatestheinstructionsetoftheC 28x TMS320C28xDSP/BIOSA pplicationProgrammingInterface(API) September2007 RevisedOctober2007 SubmitDocumentationFeedbackChapter1 SPRU812A September2007 RevisedOctober2007 analog -to-DigitalConverter(ADC)TheTMS320 x2833xADCmoduleisa12-bitpipelinedanalog- to-digitalconverter(ADC).

5 Theanalogcircuitsofthisconverter,referre dtoasthecoreinthisdocument,includethefro nt-endanalogmultiplexers(MUXs),sample-an d-hold(S/H)circuits,theconversioncore,vo ltageregulators, ,referredtoasthewrapperinthisdocument,in cludeprogrammableconversionsequencer,res ultregisters,interfacetoanalogcircuits,i nterfacetodeviceperipheralbus, , September2007 RevisedOctober2007 analog -to-DigitalConverter(ADC) Value+0, digital Value+4096 Input analog Voltage*ADCLO3when input 0 Vwhen 0 V < input < 3 Vwhen input 3 VDigital Value+4095,FeaturesTheADCmodulehas16chan nels, , ; , ,oncetheconversioniscompleted, , : 12-bitADCcorewithbuilt-indualsample-and- hold(S/H) Simultaneoussamplingorsequentialsampling modes Analoginput:0 Vto3V ,ADCclock, 16-channel,multiplexedinputs Autosequencingcapabilityprovidesupto16"a utoconversions" Sequencercanbeoperatedastwoindependent8- statesequencersorasonelarge16-stateseque ncer( ,twocascaded8-statesequencers).

6 Sixteenresultregisters(individuallyaddre ssable)tostoreconversionvalues Thedigitalvalueoftheinputanalogvoltageis derivedby:AAllfractionalvaluesaretruncat ed. Multipletriggersassourcesforthestart-of- conversion(SOC)sequence S/W-softwareimmediatestart ePWM1-6 GPIOXINT2 Flexibleinterruptcontrolallowsinterruptr equestoneveryend-of-sequence(EOS)orevery otherEOS Sequencercanoperatein"start/stop"mode,al lowingmultiple"time-sequencedtriggers"to synchronizeconversions. ePWMtriggerscanoperateindependentlyindua l-sequencermode. Sample-and-hold(S/H) (ADC)SPRU812A September2007 RegistersePWMx SOCBS/WGPIO/XINT2_ADCSOCePWMx SOCAS/WSequencer 2 Sequencer 1 SOCSOCADC Control Registers70B7h70B0h70 AFh70A8hResult Reg 15 Result Reg 8 Result Reg 7 Result Reg 1 Result Reg 0moduleADC12-BitAnalogMUXADCINA0 ADCINA7 ADCINB0 ADCINB7 Systemcontrol blockHigh-speedprescalerHSPCLKC28xSYSCLK OUTS/H- (1)Address(2)Size(x16)

7 DescriptionADCTRL10x71001 ADCC ontrolRegister1 ADCTRL20x71011 ADCC ontrolRegister2 ADCMAXCONV0x71021 ADCM aximumConversionChannelsRegisterADCCHSEL SEQ10x71031 ADCC hannelSelectSequencingControlRegister1 ADCCHSELSEQ20x71041 ADCC hannelSelectSequencingControlRegister2 ADCCHSELSEQ30x71051 ADCC hannelSelectSequencingControlRegister3 ADCCHSELSEQ40x71061 ADCC hannelSelectSequencingControlRegister4 ADCASEQSR0x71071 ADCAuto-SequenceStatusRegisterADCRESULT0 0x71080x0B001 ADCC onversionResultBufferRegister0 ADCRESULT10x71090x0B011 ADCC onversionResultBufferRegister1 ADCRESULT20x710A0x0B021 ADCC onversionResultBufferRegister2 ADCRESULT30x710B0x0B031 ADCC onversionResultBufferRegister3 ADCRESULT40x710C0x0B041 ADCC onversionResultBufferRegister4 ADCRESULT50x710D0x0B051 ADCC onversionResultBufferRegister5 ADCRESULT60x710E0x0B061 ADCC onversionResultBufferRegister6 ADCRESULT70x710F0x0B071 ADCC onversionResultBufferRegister7 ADCRESULT80x71100x0B001 ADCC onversionResultBufferRegister8 ADCRESULT90x71110x0B091 ADCC onversionResultBufferRegister9(1)Theregi stersinthiscolumnarePeripheralFrame2regi sters.

8 (2) (0x7108-0x7117) (0x0B00-0x0B0F) , September2007 RevisedOctober2007 analog -to-DigitalConverter(ADC) (continued)NameAddress(1)Address(2)Size( x16)DescriptionADCRESULT100x71120x0B0A1 ADCC onversionResultBufferRegister10 ADCRESULT110x71130x0B0B1 ADCC onversionResultBufferRegister11 ADCRESULT120x71140x0B0C1 ADCC onversionResultBufferRegister12 ADCRESULT130x71150x0B0D1 ADCC onversionResultBufferRegister13 ADCRESULT140x71160x0B0E1 ADCC onversionResultBufferRegister14 ADCRESULT150x71170x0B0F1 ADCC onversionResultBufferRegister15 ADCTRL30x71181 ADCC ontrolRegister3 ADCST0x71191 ADCS tatusRegister0x711 AReserved20x711 BADCREFSEL0x711C1 ADCR eferenceSelectRegisterADCOFFTRIM0x711D1 ADCO ffsetTrimRegister0x711 EReserved2 ADCS tatusRegister0x711 FToobtainthespecifiedaccuracyoftheADC, , , (SEQ1andSEQ2)thatcanalsobecascadedtogeth ertoformone16-statesequencer(SEQ).Thewor d"state" (16-state,cascaded)anddual(two8-state,se parated)sequencermodesareshowninFigure1- 4andFigure1-5, , , , ,thedigitalvalueoftheselectedchannelisst oredintheappropriateresultregister(ADCRE SULTn).

9 (ThefirstresultisstoredinADCRESULT0,thes econdresultinADCRESULT1,andsoon).Itisals opossibletosamplethesamechannelmultiplet imes,allowingtheusertoperform"over-sampl ing", :Inthesequentialsamplingdual-sequencermo de, , , , , , (orpairofconversionsinsimultaneoussampli ngmode),thecurrentCONV xxbitfielddefinesthepin(orpairofpins) , , ,ifCONV xxcontainsthevalue0101b, , (ADC)SPRU812A September2007 windowADCC lock[C0NV00] [C0NV00] SC1 ADC SOC triggerC1 Legend: C1 Duration of time for result register updateS Acquisition windowSChannelSelectSH Clock[C0NV01](A)AutoconversionSequencerP rincipleofOperationsamplingmode, ,iftheCONV xxregistercontainsthevalue0110b,ADCINA6i ssampledbyS/H-AandADCINB6 ,ADCINA1issampledbyS/H-AandADCINB1 , (ADCRESULT0forSEQ1,assumingthesequencerh asbeenreset).TheresultoftheS/H-Bconversi onisplacedinthenextADCRESULT nregister(ADCRESULT1forSEQ1,assumingthes equencerhasbeenreset).

10 Theresultregisterpointeristhenincreasedb ytwo(topointtoADCRESULT2forSEQ1,assuming thesequencerhadoriginallybeenreset). , (SMODE=0)AADC channeladdresscontainedin[CONV00]4-bitre gister; September2007 RevisedOctober2007 analog -to-DigitalConverter(ADC) acquisition windowClock[CONV00] SOCL egend:C1 Duration of time for Ax channel result in result registerC2 Duration of time for Bx channel result in result registerS Acquisition window[CONV00](A)C2 ADC ClockChannelSelectSH ClockADC SOCT riggerSC2C1[CONV01](A) , (SMODE=1)AADC channeladdresscontainedin[CONV00]4-bitre gister;[CONV00]meansA0/B0channels;[CONV0 1]meansA1 (ADC)SPRU812A September2007 Sel (CONV00)Ch Sel (CONV01)Ch Sel (CONV03)Ch Sel (CONV02)Ch Sel (CONV15)Statepointer12-bitanalog-to-digi talconverter (ADC)4 SOCEOC412 analog MUXR esult MUXR esultselect12 ADCRESULT0 Autosequencerstate machineStart-of-sequence triggerSoftwareePWMx SOCAePWMx SOCBE xternal pin(GPIO/XINT2_ADCSOC)MUXselectNote: Possible values are:Channel select = 0 to 15 ADCMAXCONV = 0 to 15 ADCRESULT1 ADCRESULT2 ADCRESULT15 MUXselectADCINB1 ADCINB7 MUXselectADCINB0S/H- September2007 RevisedOctober2007 analog -to-DigitalConverter(ADC) Sel (CONV00)Ch Sel (CONV01)Ch Sel (CONV03)Ch Sel (CONV02)Ch Sel (CONV07)Statepointer12-bit A/D converterEOC12 Result MUXR esultselect12 ADCRESULT0 ADCRESULT1 ADCRESULT7 SEQ1 SoftwareePWMx SOCAE xternal pin (XINT2_ADCSOC)Note: Possible values.