Example: stock market

Zynq UltraScale Plus Product Selection Guide - Xilinx

Copyright 2016 2017 Xilinx . Copyright 2016 2017 2 CGDevicesEGDevicesEVDevicesApplication ProcessorZynq UltraScale + MPSoCsDual-core ARM Cortex -A53 MPCore up to ProcessorGraphics ProcessorVideo CodecProgrammable LogicDual-core ARM Cortex-R5 MPCore up to 533 MHz103K 600K system Logic CellsApplicationsQuad-core ARM Cortex-A53 MPCore up to ARM Cortex-R5 MPCore up to 600 MHz103K 1143K system Logic CellsMali -400 MP2 Quad-core ARM Cortex-A53 MPCore up to ARM Cortex-R5 MPCore up to 600 MHz192K 504K system Logic CellsMali -400 / Situational Awareness Surveillance/Reconnaissance Smart Vision Image Manipulation Graphic Overlay Human Machine Interface Automotive ADAS Video processing Interactive Display Flight Navigation Missile & Munitions Military

Graphics Processing Unit Mali™-400 MP2 up to 667MHz Memory L2 Cache 64KB External Memory ... System Logic Cells (K) 81 103 154 192 256 469 504 600 653 747 926 1,143 ... Zynq UltraScale+ MPSoC Product Tables and Product Selection Guide ...

Tags:

  System, Processing, Xilinx, Zynq, Ultrascale, Mpsoc, Zynq ultrascale

Information

Domain:

Source:

Link to this page:

Please notify us if you found a problem with this document:

Other abuse

Transcription of Zynq UltraScale Plus Product Selection Guide - Xilinx

1 Copyright 2016 2017 Xilinx . Copyright 2016 2017 2 CGDevicesEGDevicesEVDevicesApplication ProcessorZynq UltraScale + MPSoCsDual-core ARM Cortex -A53 MPCore up to ProcessorGraphics ProcessorVideo CodecProgrammable LogicDual-core ARM Cortex-R5 MPCore up to 533 MHz103K 600K system Logic CellsApplicationsQuad-core ARM Cortex-A53 MPCore up to ARM Cortex-R5 MPCore up to 600 MHz103K 1143K system Logic CellsMali -400 MP2 Quad-core ARM Cortex-A53 MPCore up to ARM Cortex-R5 MPCore up to 600 MHz192K 504K system Logic CellsMali -400 / Situational Awareness Surveillance/Reconnaissance Smart Vision Image Manipulation Graphic Overlay Human Machine Interface Automotive ADAS Video processing Interactive Display Flight Navigation Missile & Munitions Military

2 Construction Secure Solutions Networking Cloud Computing Security Data Center Machine Vision Medical Endoscopy Sensor processing & Fusion Motor Control Low-cost Ultrasound Traffic Engineering Copyright 2016 2017 3 zynq UltraScale + MPSoCs: CG Block DiagramProcessing SystemProgrammable LogicMemoryPlatformManagement UnitConfiguration and Security UnitSystemManagementPowerManagementAppli cation processing Unit21 ARM Cortex -A53 NEON 32 KBI-Cachew/ParityFloating Point Unit32 KBD-Cachew/ECCM emoryManagementUnitEmbeddedTraceMacrocel lGIC-400 SCU1MB L2 w/ECCCCI/SMMUC onfigAES Decryption, Authentication, Secure BootVoltage/TempMonitorHigh-Speed / ConnectivityDDR4/3/3L, LPDDR4/332/64-Bit w/ ECC256KB OCMwith ECCReal-Time processing Unit21 ARM Cortex -R5 Vector FloatingPoint Unit128KB TCM w/ECC32KB I-Cachew/ECC32KB D-Cachew/ECCGICM emory ProtectionUnitFunctionalSafetyTrustZoneG igECANUARTSPIQuad SPI NORNANDSD/eMMCUSB FunctionsTimers, WDT, Resets.

3 Clocking & DebugMultichannel DMAS torage & Signal ProcessingBlock RAMU ltraRAMDSPG eneral-Purpose I/OHigh-Performance HP I/OHigh-Density HD I/OHigh-Speed ConnectivityGTHPCIe Gen4 system Monitor Copyright 2016 2017 4 zynq UltraScale + MPSoCs: CG DevicesDevice Name(1)ZU2 CGZU3 CGZU4 CGZU5 CGZU6 CGZU7 CGZU9 CGProcessing system (PS)Application Processor UnitProcessor CoreDual-coreARM Cortex -A53 MPCore up to w/ECCL1 Cache 32KB I / D per core, L2 Cache 1MB, on-chip Memory 256 KBReal-Time Processor UnitProcessor CoreDual-coreARM Cortex-R5 MPCoreup to 533 MHzMemory w/ECCL1 Cache 32KB I / D per core, Tightly Coupled Memory 128KB per coreExternal MemoryDynamic Memory Interfacex32/x64:DDR4, LPDDR4, DDR3, DDR3L, LPDDR3 with ECCS tatic Memory InterfacesNAND, 2x Quad-SPIC onnectivityHigh-Speed ConnectivityPCIe Gen2 x4, 2x , SATA , DisplayPort, 4x Tri-mode Gigabit EthernetGeneral Connectivity2xUSB , 2x SD/SDIO, 2x UART, 2x CAN , 2x I2C, 2x SPI, 4x 32b GPIOI ntegrated Block FunctionalityPower ManagementFull / Low / PL / Battery Power DomainsSecurityRSA, AES, and SHAAMS - system Monitor 10-bit, 1 MSPS Temperatureand Voltage MonitorPS to PL Interface12 x 32/64/128b AXI PortsProgrammable Logic (PL)Programmable FunctionalitySystem Logic Cells (K)103154192256469504600 CLB Flip-Flops (K)94141176234429461548 CLB LUTs (K)477188117215230274 MemoryMax.

4 Distributed RAM (Mb) Block RAM (Mb) (Mb) Tiles (CMTs)3344484 Integrated IPDSP Slices2403607281,2481,9731,7282,520 PCI Express Gen 3x16 / Gen4x8--22-2-150G Interlaken-------100G Ethernet MAC/PCS w/RS-FEC-------AMS - system Monitor1111111 TransceiversGTH Transceivers--1616242424 GTY Transceivers-------Speed GradesExtended(2)-1 -2 -2 LIndustrial-1 -1L -2 Notes: full part number details, see the Ordering Information section in DS891, zynq UltraScale + mpsoc (Tj = 0 C to 110 C). For more details, see the Ordering Information section in DS891, zynq UltraScale + mpsoc Overview. Copyright 2016 2017 5 processing SystemProgrammable LogicMemoryPlatformManagement UnitConfiguration and Security UnitSystemManagementPowerManagementSyste m FunctionsApplication processing Unit321 ARM Cortex -A53 NEON 32 KBI-Cachew/ParityFloating Point Unit32 KBD-Cachew/ECCM emoryManagementUnitEmbeddedTraceMacrocel l4 GIC-400 SCU1MB L2 w/ECCCCI/SMMUC onfigAES Decryption, Authentication, Secure BootVoltage/TempMonitorTimers, WDT, Resets, Clocking & DebugHigh-Speed / ConnectivityDDR4/3/3L.

5 LPDDR4/332/64-Bit w/ECC256KB OCMwith ECCReal-Time processing Unit21 ARM Cortex -R5 Vector FloatingPoint Unit128KB TCM w/ECC32KB I-Cachew/ECC32KB D-Cachew/ECCGICM emory ProtectionUnitGraphics processing UnitARM Mali -400 MP2 Memory Management Unit64KB L2 CacheGeometryProcessorPixelProcessorPixe lProcessor12 FunctionalSafetyTrustZoneGigECANUARTSPIQ uad SPI NORNANDSD/eMMCUSB DMAHigh-Speed ConnectivityGTH100G EMACGTYPCIe Gen4 InterlakenZynq UltraScale + MPSoCs: EG Block DiagramStorage & Signal ProcessingBlock RAMU ltraRAMDSPG eneral-Purpose I/OHigh-Performance HP I/OHigh-Density HD I/OSystem Monitor Copyright 2016 2017 6 zynq UltraScale + MPSoCs: EG DevicesNotes: full part number details, see the Ordering Information section in DS891, zynq UltraScale + mpsoc (Tj = 0 C to 110 C).

6 For more details, see the Ordering Information section in DS891, zynq UltraScale + mpsoc Name(1)ZU2 EGZU3 EGZU4 EGZU5 EGZU6 EGZU7 EGZU9 EGZU11 EGZU15 EGZU17 EGZU19 EGProcessing system (PS)Application Processor UnitProcessor CoreQuad-coreARM Cortex -A53 MPCore up to w/ECCL1 Cache 32KB I / D per core, L2 Cache 1MB, on-chip Memory 256 KBReal-Time Processor UnitProcessor CoreDual-coreARM Cortex-R5 MPCore up to 600 MHzMemory w/ECCL1 Cache 32KB I / D per core, Tightly Coupled Memory 128KB per coreGraphic & Video AccelerationGraphics processing UnitMali -400 MP2 up to 667 MHzMemory L2 Cache 64 KBExternal MemoryDynamic Memory Interfacex32/x64:DDR4, LPDDR4, DDR3, DDR3L, LPDDR3 with ECCS tatic Memory InterfacesNAND, 2x Quad-SPIC onnectivityHigh-Speed ConnectivityPCIe Gen2 x4, 2x , SATA , DisplayPort, 4x Tri-mode Gigabit EthernetGeneral Connectivity2xUSB , 2x SD/SDIO, 2x UART, 2x CAN , 2x I2C, 2x SPI, 4x 32b GPIOI ntegrated Block FunctionalityPower ManagementFull / Low / PL / Battery Power DomainsSecurityAMS - system Monitor RSA, AES, and SHA10-bit, 1 MSPS Temperatureand Voltage MonitorPS to PL Interface12 x 32/64/128b AXI PortsProgrammable Logic (PL)Programmable FunctionalitySystem Logic Cells (K)1031541922564695046006537479261,143 CLB Flip-Flops (K)941411762344294615485976828471,045 CLB LUTs (K)477188117215230274299341423523 MemoryMax.

7 Distributed RAM (Mb) Block RAM (Mb) (Mb) Tiles (CMTs)3344484841111 Integrated IPDSP Slices2403607281,2481,9731,7282,5202,928 3,5281,5901,968 PCI Express Gen 3x16 / Gen4x8--22-2-4-45150G Interlaken-------1-24100G Ethernet MAC/PCS w/RS-FEC-------2-24 AMS - system Monitor11111111111 TransceiversGTH Transceivers--161624242432244444 GTY Transceivers-------16-2828 Speed GradesExtended(2)-1 -2 -2L-1 -2 -2L -3-1 -2 -2L -3 Industrial-1 -1L -2 Copyright 2016 2017 7 processing SystemProgrammable LogicMemoryPlatformManagement UnitConfiguration and Security UnitSystemManagementPowerManagementSyste m FunctionsApplication processing Unit321 ARM Cortex -A53 NEON 32 KBI-Cachew/ParityFloating Point Unit32 KBD-Cachew/ECCM emoryManagementUnitEmbeddedTraceMacrocel l4 GIC-400 SCU1MB L2 w/ECCCCI/SMMUC onfigAES Decryption, Authentication, Secure BootVoltage/TempMonitorTimers, WDT, Resets, Clocking& DebugHigh-Speed / ConnectivityDDR4/3/3L.

8 LPDDR4/332/64 bit w/ECC256KB OCMwith ECCReal-Time processing Unit21 ARM Cortex -R5 Vector FloatingPoint Unit128KB TCM w/ECC32KB I-Cachew/ECC32KB D-Cachew/ECCGICM emory ProtectionUnitGraphics processing UnitARM Mali -400 MP2 Memory Management Unit64KB L2 CacheGeometryProcessorPixelProcessorPixe lProcessor12 FunctionalSafetyTrustZoneGigECANUARTSPIQ uad SPI NORNANDSD/eMMCUSB DMAV ideo UltraScale + MPSoCs: EV Block DiagramStorage & Signal ProcessingBlock RAMU ltraRAMDSPG eneral-Purpose I/OHigh-Performance HP I/OHigh-Density HD I/OHigh-Speed ConnectivityGTHPCIe Gen4 system Monitor Copyright 2016 2017 8 zynq UltraScale + MPSoCs: EV DevicesNotes: full part number details, see the Ordering Information section in DS891, zynq UltraScale + mpsoc (Tj = 0 C to 110 C).

9 For more details, see the Ordering Information section in DS891, zynq UltraScale + mpsoc Name(1)ZU4 EVZU5 EVZU7 EVProcessing system (PS)Application Processor UnitProcessor CoreQuad-coreARM Cortex -A53 MPCore up to w/ECCL1 Cache 32KB I / D per core, L2 Cache 1MB, on-chip Memory 256 KBReal-Time Processor UnitProcessor CoreDual-coreARM Cortex-R5 MPCore up to 600 MHzMemory w/ECCL1 Cache 32KB I / D per core, Tightly Coupled Memory 128KB per coreGraphic & Video AccelerationGraphics processing UnitMali -400 MP2 up to 667 MHzMemory L2 Cache 64 KBExternal MemoryDynamic Memory Interfacex32/x64:DDR4, LPDDR4, DDR3, DDR3L, LPDDR3 with ECCS tatic Memory InterfacesNAND, 2x Quad-SPIC onnectivityHigh-Speed ConnectivityPCIe Gen2 x4, 2x , SATA , DisplayPort, 4x Tri-mode Gigabit EthernetGeneral Connectivity2xUSB , 2x SD/SDIO, 2x UART, 2x CAN , 2x I2C, 2x SPI, 4x 32b GPIOI ntegrated Block FunctionalityPower ManagementFull / Low / PL / Battery Power DomainsSecurityAMS - system Monitor RSA, AES, and SHA10-bit, 1 MSPS Temperatureand Voltage MonitorPS to PL Interface12 x 32/64/128b AXI PortsProgrammable Logic (PL)Programmable FunctionalitySystem Logic Cells (K)192256504 CLB Flip-Flops (K)176234461 CLB LUTs (K)88117230 MemoryMax.

10 Distributed RAM (Mb) Block RAM (Mb) (Mb) Tiles (CMTs)448 Integrated IPDSP Slices7281,2481,728 Video Codec Unit (VCU)111 PCI Express Gen 3x16 / Gen4x8222150G Interlaken---100G Ethernet MAC/PCS w/RS-FEC---AMS - system Monitor111 TransceiversGTH Transceivers161624 GTY Transceivers---Speed GradesExtended(2)-1 -2 -2L -3 Industrial-1 -1L -2 Copyright 2016 2017 : I/O is a combination of PS MIO and PS with the same last letter and number sequence, , A484, are footprint compatible with all other UltraScale devices with the same full part number details, see the Ordering Information section in DS891, zynq UltraScale + mpsoc packages are only offered in ballpitch. All other packages are offered in ball transceivers in the C784 package support data rates up to zynq UltraScale + MPSoCsPS I/Os(1), High-Density (HD) I/O, High-Performance (HP) I/OsPS-GTR 6Gb/s, GTH , GTY (2,3)Dimensions(mm)ZU2ZU3ZU4ZU5ZU6ZU7ZU9 ZU11ZU15ZU17ZU19A484(4)19x19170, 24, 584, 0, 0170, 24, 584, 0, 0A625(4)21x21170, 24, 1564, 0, 0170, 24, 1564, 0, 0C784(4,5)


Related search queries