FIFO Generator v13 - Xilinx
FIFO Generator IP Product GuideVivado Design SuitePG057 April 5, 2017FIFO Generator April 5, 2017Table of ContentsIP FactsChapter 1: OverviewNative Interface FIFOs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5AXI Interface FIFOs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6Feature Summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8Applications.
FIFO Generator v13.1 www.xilinx.com 5 PG057 April 5, 2017 Chapter 1 Overview The FIFO Generator core is a fully verified first-in first-out memory queue for use in any
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