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Lecture11-MOS Cap Delay

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EE1411EECS1411Lecture #11EE141EE141--Fall 2010Fall 2010Digital Integrated Digital Integrated CircuitsCircuitsLecture 11Lecture 11MOS Capacitance MOS Capacitance and Delayand DelayEE1412EECS1412Lecture #11AnnouncementsAnnouncements No lab Fri., Mon. Labs restart next week Midterm #1 Thurs. Oct. 7th, 6:30-8:00pm Exam is open notes, book, calculators, #11Class MaterialClass Material Last lecture Using the MOS model: Inverter VTC Today s lecture MOS Capacitance Using the MOS Model: Delay Reading ( , )EE1414EECS1414Lecture #11MOS CapacitanceMOS CapacitanceEE1415EECS1415Lecture #11CGDCGSCSBCDBCGBMOS CapacitancesMOS Capacitances= CGCS+ CGSO= CGCD+ CGDO= CGCB= CdiffGSDB= CdiffEE1416EECS1416Lecture #11Gate CapacitanceGate Capacitance Capacitance (per area) from gate across the oxide is W L Cox, where Cox= ox/toxEE1417EECS1417Lecture #11Gate CapacitanceGate Capacitance Distribution between terminals is complex Capacitance is really distributed Useful models lump it to the terminals Several operating regions: Way off, off, transistor linear, transistor saturatedEE1418EECS1418Lecture #11Transistor In CutoffTransistor In Cutoff When the transistor is off, no carriers in channel to form the other side of the capacitor.

EE141 25 EECS141 Lecture #11 25 The Miller Effect V in M1 C gd1 V out ∆V ∆ As V in increases, V out drops – Once get into the transition region, gain from V in to V out > 1 So, C gd experiences voltage swing larger than V

  Delay, Mos cap delay

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