Serial Peripheral Interface (SPI) with Audio Codec Support

← Back to document page

2013 Microchip Technology 1HIGHLIGHTSThis section of the manual contains the following ........................................ ........................................ ....................................... and Control Registers ........................................ ........................................ ............ of Operation ........................................ ........................................ ........................ Protocol Interface ........................................ ........................................ ........................................ . in Power-Saving and Debug of Various Resets ........................................ ........................................ ................ Using SPI Modules.

In Normal mode operation, the SPI master controls the generation of the serial clock. The num-ber of output clock pulses corresponds to the transfer data width: 8, 16 or 32 bits, or depending upon variable data width configuration, from 2 to 32-bit. Figure 1-2 and Figure 1-3 illustrate SPI master-to-slave and slave-to-master device connections.

  Master, Slave