Accurately Measuring ADC Driving Circuit Settling …
ApplicationReportSLYT262A January2007 RevisedMay 2015AccuratelyMeasuringADCDrivingCircuit SettlingTimeRajivMantri,BhaskarGoswamiAB STRACTManymoderndataacquisitionsystemsco nsistof highspeed,high-resolutionADCs.(1)CMOS-sw itched,capacitorbasedADCsare oftenchosenfor suchdesignsdue to theirlow cost and low an unbufferedfrontend directlycoupledto the effectivelyminimizenoiseand signaldistortion,it is necessaryto drivethe ADCwith a high-speed,lownoise,low-distortionoperat ionalamplifier.(2)To achieveminimaldistortionit is importantfor the op ampoutputto settleto thedesiredaccuracywithinthe acquisitiontimeof the op ampsettlingtimeis eithercalculatedfromthe frequencyresponsespecifiedin the datasheetor measuredby probingthe outputwithan oscilloscopethat has a limitationon differencebetweenthe op ampinputandoutputis amplifiedto limitedby the oscilloscoperesolutionor ,the settlingtimeof the op ampis affectedby the parasiticcapacitanceand inductanceintroducedby the anothermethod,the differencebetweenoutputand inputis amplifiedto increasethe resolutionof the thesemethodsincludesthe parasiticcapacitanceand inductancepresentin the of SamplesfromB to A of Tables1Comparisonof January2007 RevisedMay 2015AccuratelyMeasuringADCDrivingCircuit SettlingTimeSubmitDocumentationFeedbackC opyright
Application Report SLYT262A–January 2007–Revised May 2015 Accurately Measuring ADC Driving Circuit Settling Time Rajiv Mantri, Bhaskar Goswami
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