The Electrostatic Semiconductor Wafer Clamping/Chucking ...

shrink below the present 45 nm state of the art, damage in processing due to electrostatic discharge (ESD) becomes a serious issue. Again, the ability to tailor the shape of the falling edge of the ESC waveforms minimizes the possibility of ESD and makes the product more attractive for next generation processing.

  Discharge, Semiconductors, Electrostatic, Clamping, Wafer, Electrostatic discharge, Chucking, The electrostatic semiconductor wafer clamping chucking