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R XC2C64A CoolRunner-II CPLD - Xilinx
www.xilinx.comXC2C64A CoolRunner-II CPLD 2 www.xilinx.com DS311 (v2.3) November 19, 2008 Product Specification R RealDigital Design Technology Xilinx® CoolRunner-II CPLDs are fabricated on a 0.18 micron process technology which is derived from lead-
R XC2C64A CoolRunner-II CPLD - Xilinx
www.xilinx.com- IEEE1149.1 JTAG Boundary Scan Test - Optional Schmitt-trigger input (per pin) - Two separate I/O banks - RealDigital 100% CMOS product term generation - Flexible clocking modes · Optional DualEDGE triggered registers - Global signal options with macrocell control · Multiple global clocks with phase selection per macrocell