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04 ARM Architecture Overview

1 Confidential11 ARM Architecture Overview222 Development of the ARM Architecture4 TARM7 TDMIARM922 TThumb instruction setARM926EJ-SARM946E-SARM966E-SImproved ARM/Thumb InterworkingDSP instructionsExtensions:Jazelle (5 TEJ)5TE6 ARM1136JF-SARM1176 JZF-SARM11 MPCoreSIMD InstructionsUnaligned data supportExtensions:Thumb-2 (6T2)TrustZone (6Z)Multicore (6K)7 Note: Implementations of the same Architecture can be very different ARM7 TDMI - Architecture v4T. Von Neuman core with 3 stage pipeline ARM920T - Architecture v4T. Harvard core with 5 stage pipeline and MMUC ortex-A8/R4/M3/M1 Thumb-2 Extensions:v7A (applications) NEONv7R (real time) HW DivideV7M (microcontroller) HW Divide and Thumb-2 only Processor Architecture = instruction set + Programmer s model2 Confidential333 ARM Architecture profiles Application profile (ARMv7-A Cortex-A8) Memory management support (MMU) Highest performance at low power Influenced by multi-tasking OS system requirements TrustZone and Jazelle-RCT for a safe, extensible system Real-time profile (ARMv7-R Cortex-R4) Protected memory (MPU) Low latency and predictability real-time needs Evolutionary path for traditional embedded business Microcontroller profile (ARMv7-M Cortex-M3) Lowest gate count entry point Deterministic and predictable behavior a key priority Deeply embedded use444 Programmer s Model3 Confidential555 Data Sizes and Instruction Sets When used in relation to the A

ARM7TDMI ARM922T Thumb instruction set ARM926EJ -S ARM946E-S ARM966E-S Improved ARM/Thumb Interworking DSP instructions Extensions: Jazelle (5TEJ) 5TE 6 ARM1136JF ARM1176JZF-S ARM11 MPCore SIMD Instructions Unaligned data support ... Reference Slides. 15 Confidential 29 Reference Material

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