Transcription of © Copyright 2014 2021 Xilinx
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© Copyright 2014 2021 Xilinx
Page 2 Spartan-7 with the same last letter and number sequence, , A484, are footprint compatible with all other Spartan-7 devices with the same sequence. The footprint compatible devices within this family are outlined. I/O Optimization at the Lowest Cost andHighest Performance-per-Watt( , )Part NumberXC7S6XC7S15XC7S25XC7S50 XC7S75XC7S100 Logic ResourcesLogic Cells6,00012,80023,36052,16076,800102,40 0 Slices9382,0003,6508,15012,00016,000 CLB Flip-Flops7,50016,00029,20065,20096,0001 28,000 Memory ResourcesMax. Distributed RAM (Kb)701503136008321,100 Block RAM/FIFO w/ ECC (36 Kb each)510457590120 Total Block RAM (Kb)1803601,6202,7003,2404,320 Clock ResourcesClock Mgmt Tiles (1 MMCM + 1 PLL)223588I/O ResourcesMax.
Maximum Differential I/O Pairs 144 192 240 144 240 192 192 Integrated IP Resources DSP48 Slices 240 600 840 1,440 1,540 1,680 1,920 PCIe® Gen2(1) 1 1 1 1 1 1 1 Analog Mixed Signal (AMS) / XADC 1 1 1 1 1 1 1 Configuration AES / HMAC Blocks 1 1 1 1 1 1 1 GTX Transceivers (12.5 Gb/s Max Rate) 8 8 16 24 16 32 32 Speed Grades
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