Transcription of AN 363: FFT Co-Processor Reference Design - intel.com
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AN 363: FFT Co-Processor Reference Design - intel.com
Altera Corporation Note 363 FFT Co-Processor ReferenceDesignIntroduction The Fast Fourier Transform (FFT) Co-Processor Reference Design demonstrates the use of an Altera FPGA as a high-performance digital signal processing (DSP) Co-Processor to the Texas Instruments TMS320C6000 family of programmable digital signal processors. The hardware interface is a connection between the TI digital signal processor s external memory interface (EMIF) and the first-in first-out (FIFO) buffers on the FPGA. The Reference Design utilizes TI s TMS320C6416 DSP Starter Kit (DSK), which features a TI TMS320C6416 device and the Altera Stratix II DSP development board, which features an EP2S60F1020C4 more information on the Stratix II DSP development board, refer to Stratix II EP2S60 DSP Development Board Data Reference Design is supplied with Verilog HDL and TI DSP source code.
Altera Corporation 1 AN-363-1.0 Preliminary Application Note 363 FFT Co-Processor Reference Design Introduction The Fast Fourier Transform (FFT) co-processor reference design demonstrates the use of an Altera® FPGA as a high-performance digital signal processing (DSP) co-processor …
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