Transcription of Apalis iMX8 Datasheet - Toradex
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Apalis iMX8 Datasheet Apalis iMX8 Datasheet Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l l Page | 2 Revision History Date Doc. Rev. Apalis iMX8 Version Changes 28-Aug-2018 Rev. Initial Release 05-Oct-2018 Rev. Apalis iMX8QP 2GB added Minor changes 16-Oct-2018 Rev. Section : Correct I2S Slave pins Section : Correct AC 97 pins 07-Dec-2018 Rev. Section : Update SoC part number Section : Remove DSP feature from QP module versions 30-Jan-2019 Rev. Section : Correct pin numbers in Table 5-12 16-May-2019 Rev. Section : Added link to Azurewave website 28-Oct-2019 Rev.
heterogeneous multi-core system allows for running additional real-time operating systems on the M4 cores for time- and security-critical tasks. The i.MX 8 features a System Controller Unit (SCU), which runs on an independent Cortex-M processor. …
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