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Apalis iMX8 Datasheet - Toradex

Apalis iMX8 Datasheet Apalis iMX8 Datasheet Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l l Page | 2 Revision History Date Doc. Rev. Apalis iMX8 Version Changes 28-Aug-2018 Rev. Initial Release 05-Oct-2018 Rev. Apalis iMX8QP 2GB added Minor changes 16-Oct-2018 Rev. Section : Correct I2S Slave pins Section : Correct AC 97 pins 07-Dec-2018 Rev. Section : Update SoC part number Section : Remove DSP feature from QP module versions 30-Jan-2019 Rev. Section : Correct pin numbers in Table 5-12 16-May-2019 Rev. Section : Added link to Azurewave website 28-Oct-2019 Rev.

heterogeneous multi-core system allows for running additional real-time operating systems on the M4 cores for time- and security-critical tasks. The i.MX 8 features a System Controller Unit (SCU), which runs on an independent Cortex-M processor. …

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Transcription of Apalis iMX8 Datasheet - Toradex

1 Apalis iMX8 Datasheet Apalis iMX8 Datasheet Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l l Page | 2 Revision History Date Doc. Rev. Apalis iMX8 Version Changes 28-Aug-2018 Rev. Initial Release 05-Oct-2018 Rev. Apalis iMX8QP 2GB added Minor changes 16-Oct-2018 Rev. Section : Correct I2S Slave pins Section : Correct AC 97 pins 07-Dec-2018 Rev. Section : Update SoC part number Section : Remove DSP feature from QP module versions 30-Jan-2019 Rev. Section : Correct pin numbers in Table 5-12 16-May-2019 Rev. Section : Added link to Azurewave website 28-Oct-2019 Rev.

2 Section : Add information regarding RGMII limitation 28-Oct-2019 Rev. Section , : Secondary RGMII/RMII Ethernet interface additional notes added Section : Remove Wi-Fi power gating Section , , , : HDMI DDC Pins 205/207 changed Minor changes 23-Apr-2020 Rev. Disclaimer update Minor cosmetic improvements 07-Jul-2020 Rev. Sections and : HiFi 4 DSP functionality has been removed from the document as it is not supported anymore by this product 30-Sep-2020 Rev. Section : Update the MXM3 connector 19-Jan-2021 Rev. Section : Change ADC input resistor from 10k to 1k 18-May-2021 Rev. Section : Correction of video decode features Section 3: Updating Figure 3 and Figure 4 Section : Clarify reset state of SoC pins Section : Update reset states of SoC pins.

3 See also Section : Update default mode of SoC pins Section : Remove support for MLB Section : Default IO voltage of RGMII signals updated Section : TSN feature removed Section : Correction of LVDS description (even/odd) Section : Add support for CAN-FD Section: : Remove support for MLB Section : Rename Section and clarify module power consumption Replace KSZ9031 with KSZ9131 Minor changes Apalis iMX8 Datasheet Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l l Page | 3 Contents 1. Introduction .. 5 Hardware .. 5 Main Features .. 6 CPU .. 6 Memory .. 6 Interfaces.

4 7 Graphics Processing Unit .. 8 HD Video 8 HD Video Encode .. 8 Supported operating Systems .. 8 Interface Overview .. 8 Reference Documents .. 9 NXP 8 .. 9 Ethernet Transceiver .. 10 Audio Codec .. 10 USB Hub .. 10 Wi-Fi and Bluetooth Module .. 10 Apalis Carrier Board Design Guide .. 10 Layout Design Guide .. 10 Toradex Developer Center .. 10 Apalis Carrier Board Schematics .. 10 Toradex Pinout Designer .. 10 2. Architecture Overview .. 11 Block Diagram .. 11 3. Apalis iMX8 Connectors .. 12 Pin Numbering .. 12 Assignment .. 12 4. I/O Pins .. 18 Function Multiplexing .. 18 Pin Control.

5 19 Pin Reset Status .. 19 SoC Functions List .. 20 5. Interface Description .. 27 Power Signals .. 27 Digital Supply .. 27 Analogue Supply .. 27 Power Management Signals .. 27 GPIOs .. 28 Wakeup Source .. 28 Ethernet .. 29 Wi-Fi and Bluetooth .. 31 USB .. 32 USB Data Signal .. 33 USB Control Signals .. 34 Display .. 35 Parallel RGB LCD interface .. 35 LVDS .. 35 HDMI .. 39 Analog VGA .. 40 DisplayPort (DP) and Embedded DisplayPort (eDP) .. 40 Display Serial Interface (DSI) .. 42 PCI Express .. 43 Apalis iMX8 Datasheet Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l l Page | 4 SATA.

6 44 I2C .. 45 real -Team Clock (RTC) recommendation .. 46 UART .. 47 SPI .. 49 PWM (Pulse Width Modulation) .. 51 OWR (One-Wire) .. 52 SD/MMC .. 52 Analogue Audio .. 55 Synchronous Audio Interface (SAI) .. 55 Synchronous Audio Interface used as 56 Synchronous Audio Interface used as AC 97 .. 57 Enhanced Serial Audio Interface (ESAI) .. 57 S/PDIF (Sony-Philips Digital Interface I/O) .. 58 Medium Quality Sound (MQS) .. 58 Touch Panel Interface .. 59 Analogue Inputs .. 60 Camera Interface .. 61 Clock Output .. 62 Keypad .. 63 Controller Area Network (CAN) .. 63 Media Local Bus (MLB150).

7 63 Quad Serial Peripheral Interface (QuadSPI, QSPI) .. 64 JTAG .. 64 6. Recovery Mode .. 65 7. Known Issues .. 66 8. Technical Specifications .. 67 Absolute Maximum Ratings .. 67 Recommended Operation Conditions .. 67 Power Consumption .. 67 Power Ramp-Up time Requirements .. 67 Mechanical Characteristics .. 68 Sockets for the Apalis Modules .. 68 Thermal Specification .. 69 Product Compliance .. 70 Apalis iMX8 Datasheet Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l l Page | 5 1. Introduction Hardware The Apalis iMX8 is a computer module based on the 8 Family of embedded system on Chips (SoC) from NXP.

8 The 8 Family consists of the 8 QuadMax, 8 QuadPlus, and 8 DualMax. The top-tier 8 QuadMax ( 8QM) features eight CPU cores. The two core complexes are configured as big/LITTLE. There are two Arm Cortex-A72 CPUs (big) which peak up to and are optimized for high computing performance. The quad-core Arm Cortex-A53 (LITTLE) cluster can run up to and run most of the use cases at low-power consumption. Additional to the main CPU complex, all 8 family members feature two Arm Cortex-M4 processors, which peak up to 266 MHz. These two processors are independent of each other and feature their own dedicated interfaces while they can also access the regular interfaces.

9 This heterogeneous multi-core system allows for running additional real - time operating systems on the M4 cores for time - and security-critical tasks. The 8 features a system Controller Unit (SCU), which runs on an independent Cortex-M processor. A major task of this controller is resource management with proper access and permission control to make sure the different M4 cores and main CPU complex are isolated from each other. This massively increases the safety of the heterogeneous multi-core system in comparison with older SoC. The 8QM features two powerful GC7000 XSVX Graphic Processing Units (GPU) from Vivante . Each independent GPU provides 32 Vega shader cores with tessellation, geometry, and compute shaders.

10 The GPUs can peak with up to 128 GFLOPS each and support OpenGL , OpenGL , and DirectX 11. The Apalis iMX8 incorporates DVFS (Dynamic Voltage and Frequency Switching) and Thermal Throttling, enabling the system to continuously adjust operating frequency and voltage in response to changes in workload and temperature achieve the best performance with the lowest power consumption. The module targets a wide range of applications, including advanced graphics, imaging, machine vision, audio, voice, video, and safety-critical; automotive: infotainment, instrument cluster, head unit, heads-up display (HUD), rear-seat entertainment, and full digital electronic cockpit (eCockpit); home/building automation; Digital Signage; Industrial Automation, Data Acquisition, Thin Clients, Robotics, and much more.


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