Transcription of ARMv8 A64 Quick Reference Conditional Instructions
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ARMv8 A64 Quick Reference Conditional Instructions
ARM64 version 2 page 1 ARMv8 A64 Quick ReferenceArithmetic InstructionsADC{S}rd, rn, rmrd = rn + rm + CADD{S}rd, rn, op2rd = rn + op2 SADRXd, rel21Xd = PC + rel ADRPXd, rel33Xd = PC63:12:012+ rel 33:12:012 CMNrd, op2rd + op2 SCMPrd, op2rd op2 SMADDrd, rn, rm, rard = ra + rn rmMNEGrd, rn, rmrd = rn rmMSUBrd, rn, rm, rard = ra rn rmMULrd, rn, rmrd = rn rmNEG{S}rd, op2rd = op2 NGC{S}rd, rmrd = rm CSBC{S}rd, rn, rmrd = rn rm CSDIVrd, rn, rmrd = rn rmSMADDLXd, Wn, Wm, XaXd = Xa + Wn WmSMNEGLXd, Wn, WmXd = Wn WmSMSUBLXd, Wn, Wm, XaXd = Xa Wn WmSMULHXd, Xn, XmXd = (Xn Xm)127:64 SMULLXd, Wn, WmXd = Wn WmSUB{S}rd, rn, op2rd = rn - op2 SUDIVrd, rn, rmrd = rn rmUMADDLXd, Wn, Wm, XaXd = Xa + Wn WmUMNEGLXd, Wn, WmXd = Wn WmUMSUBLXd, Wn, Wm, XaXd = Xa Wn WmUMULHXd, Xn, XmXd = (Xn Xm)127:64 UMULLXd, Wn, WmXd = Wn WmBit Manipulation InstructionsBFIrd, rn, #p, #nrdp+n 1:p= rnn 1:0 BFXILrd, rn, #p, #nrdn 1:0= rnp+n 1:pCLSrd, rnrd = CountLeadingOnes(rn)CLZrd, rnrd = CountLeadingZeros(rn)EXTRrd, rn, rm, #prd = rnp 1:0:rmN0 RBITrd, rnrd = ReverseBits(rn)REVrd, rnrd = BSwap(rn)REV16rd, rnfor(n= |3) rdHn=BSwap(rnHn)REV32Xd, XnXd=BSwap(Xn63:32):BSwap(Xn31:0){S,U}BF IZrd, rn, #p, #nrd
ARMv8 A64 Quick Reference Arithmetic Instructions ADCfSg rd, rn, rm rd = rn + rm + C ADDfSg rd, rn, op2 rd = rn + op2 S ADR Xd, rel 21 Xd = PC + rel ADRP Xd, Xd = PCrel 33 63:12:0 12 + rel 33:12 CMN rd, op2 rd + op2 S CMP rd, op2 rd op2 S MADD rd, rn, rm, ra rd = ra + rn rm MNEG rd, rn, rm rd = rn rm MSUB rd, rn, rm, ra rd = ra rn rm MUL rd, rn ...
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