Transcription of AXI Protocol Firewall IP v1 - Xilinx
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AXI Protocol Firewall IP IP Product GuideVivado Design SuitePG293 October 4, 2017 AXI Firewall IP October 4, of ContentsIP FactsChapter1: OverviewFeature Summary.. 4 Operation .. 5 Applications .. 10 Licensing and Ordering .. 10 Chapter2: Product SpecificationStandards .. 11 User Parameters.. 11 Port Descriptions .. 12 Register Space .. 18 Chapter3: Designing with the CoreGeneral Design Guidelines .. 22 Clocking.. 22 Resets .. 23 Chapter4: Design Flow StepsCustomizing and Generating the Core .. 24 AppendixA: DebuggingFinding Help on .. 26 AppendixB: Additional Resources and Legal NoticesXilinx Resources.. 28 Documentation Navigator and Design Hubs .. 28 References .. 29 Revision History.. 30 Please Read: Important Legal Notices .. 30 Send FeedbackAXI Firewall IP October 4, SpecificationIntroductionThe Xilinx logicore AXI Firewall IP has been developed to protect AXI XDMA from hangs and Protocol violations downstream of it that may otherwise lead to host Supports AXI3, AXI4, or AXI4-Lite interface Provides protection for the upstream network (SI connection) from failures of the downstream network (MI connection): When a failure is detected, the Firewall becomes blocked, preventing further transfers from propagating When the Firewall becomes blocked, the SI generates compliant responses for all outstanding and s
AXI Firewall IP v1.0 3 PG293 October 4, 2017 www.xilinx.com Product Specification Introduction The Xilinx® LogiCORE™ AXI Firewall IP has been developed to protect AXI XDMA from hangs
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