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Chapter 23: Wafer Level Packaging

2019 Edition Chapter 23: Wafer Level Packaging We acknowledge with gratitude the use of material and figures in this Roadmap that are excerpted from original sources. Figures & tables should be re-used only with the permission of the original source. The HIR is devised and intended for technology assessment only and is without regard to any commercial considerations pertaining to individual products or equipment. October, 2019 Table of Contents HIR Version ( ) Page ii Heterogeneous Integration Roadmap Table of Contents Chapter 1: HETEROGENEOUS INTEGRATION ROADMAP: OVERVIEW .. 1 Chapter 2: HIGH PERFORMANCE COMPUTING AND DATA CENTERS.

Wafer level packaging (WLP) came into its own around the year 2000. Prior to that time, the majority of packaging processes were mechanical, such as grinding, sawing, wire bonding, etc. The packaging process steps were performed predominantly after die singulation, as illustrated by the simplified process flow of figure 1. Figure 1.

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