Transcription of 直接数字频率合成(DDS)基本原理 - Analog Devices
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直接数字频率合成(DDS)基本原理 - Analog Devices
MT-085 (DDS) fcADDRESSCOUNTERSINLOOKUPTABLEN-BITSCLOC KREGISTERLPFDAC foutLOOKUP TABLE CONTAINS SINEDATA FOR INTEGRAL NUMBEROF CYCLESN-BITSfcADDRESSCOUNTERSINLOOKUPTAB LEN-BITSCLOCKREGISTERLPFDAC foutLOOKUP TABLE CONTAINS SINEDATA FOR INTEGRAL NUMBEROF CYCLESN-BITS 1 , 10/08, WK Page 1 of 9 DDS (DDS) 1 ( ) (PROM) DAC DAC DDS DAC PLL MT-085fcSERIALOR BYTELOADREGISTERnnFREQUENCY CONTROLPHASEREGISTERLPFDACPARALLELDELTAP HASEREGISTERMCLOCKnnPHASE ACCUMULATORnPHASETRUNCATION12-19 BITSAMPLITUDETRUNCATION2n=foM fcN-BITSn = 24 - 48 BITSPHASE-TOAMPLITUDECONVERTERM = TUNING WORDSYSTEM CLOCK(10-14) 2 DDS Page 2 of 9 DDS PROM DDS (NCO) 2 M
4,096 65,536 1,048,576 16,777,216 268,435,456 4,294,967,296 281,474,976,710,656 M = JUMP SIZE 图3：数字相位轮 Page 3 of 9 考虑n = 32，M = 1的情况。相位累加器会逐步执行2 32个可能的输出中的每一个，直至溢出 并重新开始。相应的输出正弦波频率等于输入时钟频率2 32分频。 …
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