Transcription of Defect and Yield Analysis of Semiconductor Components …
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Defect and Yield Analysis of Semiconductor Components …
HELSINKI UNIVERSITY OF TECHNOLOGY Department of Electrical and Communication Engineering Optoelectronics Laboratory Espoo, Finland 2003 Defect and Yield Analysis of Semiconductor Components and Integrated Circuits Mika Karilahti Dissertation for the degree of Doctor of Science in Technology to be presented with due permission for public examination and debate in Auditorium S4 of the Department of Electrical and Communications Engineering at Helsinki University of Technology (Espoo, Finland) on the 14th of February, 2003, at 12 o clock noon.
monitoring (PCM) data and wafer yield analyzed by using synchrotron X-ray topographic measurements, Semiconductor Science and Technology 18, 45-55 (2003). VI. M. Karilahti, Neural Net Analysis of Integrated Circuit Yield Dependence on CMOS Process Control Parameters, Microelectronics Reliability 43, 117-121 (2003). Author’s Contribution
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