Transcription of Defect and Yield Analysis of Semiconductor Components …
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Defect and Yield Analysis of Semiconductor Components …
HELSINKI UNIVERSITY OF TECHNOLOGY Department of Electrical and Communication Engineering Optoelectronics Laboratory Espoo, Finland 2003 Defect and Yield Analysis of Semiconductor Components and Integrated Circuits Mika Karilahti Dissertation for the degree of Doctor of Science in Technology to be presented with due permission for public examination and debate in Auditorium S4 of the Department of Electrical and Communications Engineering at Helsinki University of Technology (Espoo, Finland) on the 14th of February, 2003, at 12 o clock noon. ii Helsinki University of Technology Department of Electrical and Communications Engineering Optoelectronics Laboratory Box 3500 FIN-02015 HUT Espoo Tel.
Optoelectronics Laboratory, especially Dr. Markku Sopanen and Professor Harri Lipsanen. The warmest thanks to my father Thure and mother Auli for them supporting and encouraging me with my studies from the comprehensive school through to the University. I also want to thank my friends for their advices and help, also Markku Tilli from
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