Transcription of DM385 and DM388 DaVinci Digital Media Processor …
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DM385 and DM388 DaVinci Digital Media Processor …
DM385 , MARCH2013 REVISEDDECEMBER2013DM385and DM388 DaVinci DigitalMediaProcessorCheckfor Samples: DM385 , DM3881 High-PerformanceSystem-on- chip (SoC) High-PerformanceDaVinciDigitalMedia ProgrammableHigh-DefinitionVideoImagePro cessorsCoprocessing(HDVICPv2) Engine Up to 1000-MHzARM Cortex -A8 RISC Encode,Decode,TranscodeOperationsProcess or ,MPEG-2,VC-1,MPEG-4 Up to 2000 ARMC ortex-A8 MIPSSP/ASP,JPEG/MJPEG ARMC ortex-A8 Core Fourth-GenerationMotion-CompensatedNoise Filter( DM388 Only) ARMv7 Architecture MediaController In-Order,Dual-Issue,SuperscalarProcessor Core Controlsthe HDVPSS,HDVICP2,and ISS NEON MultimediaArchitecture Endianness SupportsIntegerand FloatingPoint ARMI nstructionsand Data LittleEndian Jazelle RCTE xecutionEnvironment HD VideoProcessingSubsystem(HDVPSS)
DM385, DM388 www.ti.com SPRS821D –MARCH 2013–REVISED DECEMBER 2013 DM385 and DM388 DaVinci™ Digital Media Processor Check for Samples: DM385, DM388 1 High-Performance System-on-Chip (SoC)
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