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Fault Modeling - Electrical Engineering and Computer Science

F 2002 EECS 579: Digital Testing1 Fault ModelingFault ModelingFault ModelingFault Modeling Why model faults? Some real defects in VLSI and PCB Common Fault models stuck -at faults Single stuck -at faults Fault equivalence Fault dominance and checkpoint theorem Classes of stuck -at faults and multiple faults Transistor faults SummaryF 2002 EECS 579: Digital Testing2 Why Model Faults?Why Model Faults?Why Model Faults?Why Model Faults? I/O function tests inadequate for I/O function tests inadequate for I/O function tests inadequate for I/O function tests inadequate for manufacturing (functionality versus manufacturing (functionality versus manufacturing (functionality versus manufacturing (functionality versus component and interconnect testing)component and interc)))

For digital logic single stuck-at fault model offers best advantage of tools and experience. Many other faults (bridging, stuck-open and multiple stuck-at) are largely covered by stuck-at fault tests. Stuck-short and delay faults and technology-dependent faults …

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