Transcription of FEBRUARY 2009 REVISED JUNE 2011 Two Output, …
{{id}} {{{paragraph}}}
FEBRUARY2009 REVISEDJUNE2011 TwoOutput,IntegratedVCO,Low-JitterClockG eneratorCheckforSamples:CDCM61002 DividerProgrammingUsingControlPins:1 FEATURES TwoPinsforPrescaler/FeedbackDivider2 OneCrystal/LVCMOSR eferenceInput ,25 MHz, TwoPinsforOutputSelect On-ChipVCOO peratesinFrequencyRangeof IndustrialTemperatureRange: 40 C to+85 5-mm 5-mm,32-pin,QFN(RHB)Package 2xOutputAvailable: ESDP rotectionExceeds2 kV(HBM) Pin-SelectableBetweenLVPECL,LVDS,or2-LVC MOS; LVCMOSB ypassOutputAvailable LowJitterClockDriverforHigh-EndDatacom OutputFrequencySelectableby/1,/2,/3,/4,/ 6,ApplicationsIncludingSONET,Ethernet,Fi bre/8froma SingleOutputDividerChannel,SerialATA,and HDTV SupportsCommonLVPECL/LVDSO utput Cost-EffectiveHigh-FrequencyCrystalFrequ encies:OscillatorReplacement , ,75 MHz, ,100 MHz, ,125 MHz,150 MHz, , , , ,200 MHz, ,250 MHz,TheCDCM61002isahighlyversatile, , , ,frequencysynthesizerthatcangeneratetwol ow-jitter625 MHzclockoutputs,selectablebetweenlow-vol tage SupportsCommonLVCMOSO utputpositiveemittercoupledlogic(LVPECL) ,low-voltageFrequencies:differentialsign aling(LVDS),orlow-voltage , ,75 MHz, ,complementarymetaloxidesemico
CDCM61002 www.ti.com SCAS870F –FEBRUARY 2009–REVISED JUNE 2011 Two Output, Integrated VCO, Low-JitterClock Generator Check for Samples: CDCM61002
Domain:
Source:
Link to this page:
Please notify us if you found a problem with this document:
{{id}} {{{paragraph}}}