Transcription of Floating-Point Operator v7 - Xilinx
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Floating-Point Operator v7 - Xilinx
Floating-Point Operator IP Product GuideVivado Design SuitePG060 December 16, 2020 Floating-Point Operator December 16, of ContentsIP FactsChapter 1: OverviewNavigating Content by Design Process .. 2 Core Overview .. 2 Unsupported Features .. 2 Licensing and Ordering .. 3 Chapter 2: Product SpecificationStandards .. 4 Performance .. 6 Resource Utilization .. 7 Port Descriptions .. 8 Chapter 3: Designing with the CoreGeneral Design Guidelines .. 14 Accumulator Design Guidelines .. 17 Clocking.. 19 Resets .. 20 Protocol Description .. 20 Chapter 4: Design Flow StepsCustomizing and Generating the Core .. 28 Constraining the Core .. 38 Simulation .. 39 Synthesis and Implementation.
Floating-Point Operator core treats all NaNs as Quiet NaNs. When any NaN is supplied as one of the operands to the core, the result is a Quiet NaN, and an invalid operation exception is not raised (as would be the case for signaling NaNs). The exceptions to this rule are floating-point to fixed-point conversion and the absolute value operator.
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