Transcription of Fractional/Integer-N PLL Basics - Texas Instruments
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Fractional/Integer-N PLL Basics - Texas Instruments
Technical BriefSWRA029 Wireless Communication Business UnitAugust 1999 Fractional/Integer-N PLL BasicsEdited by Curtis BarrettWireless Communication Business UnitAbstract Phase Locked Loop (PLL) is a fundamental part of radio, wireless and telecommunicationtechnology. The goal of this document is to review the theory, design and analysis of PLLcircuits. PLL is a simple negative feedback architecture that allows economicmultiplication of crystal frequencies by large variable numbers. By studying the loopcomponents and their reaction to various noise sources, we will show that PLL isuniquely suited for generation of stable, low noise tunable RF signals for radio, timing andwireless of the main challenges fulfilled by PLL technology are economy in size, power andcost while maintaining good spectral document details basic loop transfer functions, loop dynamics, noise sources a
To accomplish this, a reference frequency must be provided to the phase detector. Typically, the TCXO frequency (Fx), is divided down (by R) “on-board” the PLL IC. The phase detector utilizes this signal as a reference to tune the VCO and, in a “locked state,” it must be equal to the desired output frequency, Fvco, divided by N.
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